443a848cd3
Moved common FPU exception handling code out of head.S so it can be used by several of the sub-architectures that might of a full PowerPC FPU. Also, uses new CONFIG_PPC_FPU define to fix alignment exception handling for floating point load/store instructions to only occur if we have a hardware FPU. Signed-off-by: Jason McMullan <jason.mcmullan@timesys.com> Signed-off-by: Kumar Gala <kumar.gala@freescale.com> Signed-off-by: Paul Mackerras <paulus@samba.org> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
134 lines
3.5 KiB
ArmAsm
134 lines
3.5 KiB
ArmAsm
/*
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* FPU support code, moved here from head.S so that it can be used
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* by chips which use other head-whatever.S files.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*
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*/
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#include <linux/config.h>
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#include <asm/processor.h>
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#include <asm/page.h>
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#include <asm/mmu.h>
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#include <asm/pgtable.h>
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#include <asm/cputable.h>
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#include <asm/cache.h>
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#include <asm/thread_info.h>
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#include <asm/ppc_asm.h>
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#include <asm/offsets.h>
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/*
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* This task wants to use the FPU now.
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* On UP, disable FP for the task which had the FPU previously,
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* and save its floating-point registers in its thread_struct.
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* Load up this task's FP registers from its thread_struct,
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* enable the FPU for the current task and return to the task.
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*/
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.globl load_up_fpu
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load_up_fpu:
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mfmsr r5
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ori r5,r5,MSR_FP
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#ifdef CONFIG_PPC64BRIDGE
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clrldi r5,r5,1 /* turn off 64-bit mode */
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#endif /* CONFIG_PPC64BRIDGE */
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SYNC
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MTMSRD(r5) /* enable use of fpu now */
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isync
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/*
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* For SMP, we don't do lazy FPU switching because it just gets too
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* horrendously complex, especially when a task switches from one CPU
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* to another. Instead we call giveup_fpu in switch_to.
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*/
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#ifndef CONFIG_SMP
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tophys(r6,0) /* get __pa constant */
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addis r3,r6,last_task_used_math@ha
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lwz r4,last_task_used_math@l(r3)
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cmpwi 0,r4,0
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beq 1f
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add r4,r4,r6
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addi r4,r4,THREAD /* want last_task_used_math->thread */
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SAVE_32FPRS(0, r4)
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mffs fr0
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stfd fr0,THREAD_FPSCR-4(r4)
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lwz r5,PT_REGS(r4)
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add r5,r5,r6
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lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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li r10,MSR_FP|MSR_FE0|MSR_FE1
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andc r4,r4,r10 /* disable FP for previous task */
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stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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1:
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#endif /* CONFIG_SMP */
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/* enable use of FP after return */
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mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */
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lwz r4,THREAD_FPEXC_MODE(r5)
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ori r9,r9,MSR_FP /* enable FP for current */
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or r9,r9,r4
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lfd fr0,THREAD_FPSCR-4(r5)
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mtfsf 0xff,fr0
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REST_32FPRS(0, r5)
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#ifndef CONFIG_SMP
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subi r4,r5,THREAD
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sub r4,r4,r6
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stw r4,last_task_used_math@l(r3)
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#endif /* CONFIG_SMP */
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/* restore registers and return */
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/* we haven't used ctr or xer or lr */
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b fast_exception_return
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/*
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* FP unavailable trap from kernel - print a message, but let
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* the task use FP in the kernel until it returns to user mode.
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*/
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.globl KernelFP
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KernelFP:
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lwz r3,_MSR(r1)
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ori r3,r3,MSR_FP
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stw r3,_MSR(r1) /* enable use of FP after return */
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lis r3,86f@h
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ori r3,r3,86f@l
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mr r4,r2 /* current */
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lwz r5,_NIP(r1)
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bl printk
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b ret_from_except
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86: .string "floating point used in kernel (task=%p, pc=%x)\n"
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.align 4,0
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/*
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* giveup_fpu(tsk)
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* Disable FP for the task given as the argument,
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* and save the floating-point registers in its thread_struct.
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* Enables the FPU for use in the kernel on return.
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*/
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.globl giveup_fpu
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giveup_fpu:
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mfmsr r5
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ori r5,r5,MSR_FP
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SYNC_601
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ISYNC_601
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MTMSRD(r5) /* enable use of fpu now */
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SYNC_601
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isync
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cmpwi 0,r3,0
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beqlr- /* if no previous owner, done */
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addi r3,r3,THREAD /* want THREAD of task */
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lwz r5,PT_REGS(r3)
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cmpwi 0,r5,0
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SAVE_32FPRS(0, r3)
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mffs fr0
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stfd fr0,THREAD_FPSCR-4(r3)
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beq 1f
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lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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li r3,MSR_FP|MSR_FE0|MSR_FE1
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andc r4,r4,r3 /* disable FP for previous task */
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stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
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1:
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#ifndef CONFIG_SMP
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li r5,0
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lis r4,last_task_used_math@ha
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stw r5,last_task_used_math@l(r4)
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#endif /* CONFIG_SMP */
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blr
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