Robert Marko 0c0ac2547c arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode ... [ Upstream commit 08d2061ff9c5319a07bf9ca6bbf11fdec68f704a ] Orange Pi Zero Plus uses a Realtek RTL8211E RGMII Gigabit PHY, but its currently set to plain RGMII mode meaning that it doesn't introduce delays. With this setup, TX packets are completely lost and changing the mode to RGMII-ID so the PHY will add delays internally fixes the issue. Fixes: a7affb13b2 ("arm64: allwinner: H5: Add Xunlong Orange Pi Zero Plus") Acked-by: Chen-Yu Tsai <wens@csie.org> Tested-by: Ron Goossens <rgoossens@gmail.com> Tested-by: Samuel Holland <samuel@sholland.org> Signed-off-by: Robert Marko <robert.marko@sartura.hr> Signed-off-by: Maxime Ripard <maxime@cerno.tech> Link: https://lore.kernel.org/r/20211117140222.43692-1-robert.marko@sartura.hr Signed-off-by: Sasha Levin <sashal@kernel.org>		2021-12-29 12:23:34 +01:00
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boot	arm64: dts: allwinner: orangepi-zero-plus: fix PHY mode	2021-12-29 12:23:34 +01:00
configs
crypto
include	arm64: pgtable: make __pte_to_phys/__phys_to_pte_val inline functions	2021-11-17 09:48:47 +01:00
kernel	arm64: vdso32: suppress error message for 'make mrproper'	2021-11-26 10:47:21 +01:00
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