linux/arch/arm/mach-sa1100/include/mach/debug-macro.S
Nicolas Pitre 639da5ee37 ARM: add an extra temp register to the low level debugging addruart macro
Some platforms (like OMAP not to name it) are doing rather complicated
hacks just to determine the base UART address to use.  Let's give their
addruart macro some slack by providing an extra work register which will
allow for much needed cleanups.

This is basically a no-op as this commit is only adding the extra argument
to the macro but no one is using it yet.

Signed-off-by: nicolas Pitre <nicolas.pitre@linaro.org>
Reviewed-by: Kevin Hilman <khilman@ti.com>
2011-09-26 10:11:25 -04:00

63 lines
1.5 KiB
ArmAsm

/* arch/arm/mach-sa1100/include/mach/debug-macro.S
*
* Debugging macro include header
*
* Copyright (C) 1994-1999 Russell King
* Moved from linux/arch/arm/kernel/debug.S by Ben Dooks
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*
*/
#include <mach/hardware.h>
.macro addruart, rp, rv, tmp
mrc p15, 0, \rp, c1, c0
tst \rp, #1 @ MMU enabled?
moveq \rp, #0x80000000 @ physical base address
movne \rp, #0xf8000000 @ virtual address
@ We probe for the active serial port here, coherently with
@ the comment in arch/arm/mach-sa1100/include/mach/uncompress.h.
@ We assume r1 can be clobbered.
@ see if Ser3 is active
add \rp, \rp, #0x00050000
ldr \rv, [\rp, #UTCR3]
tst \rv, #UTCR3_TXE
@ if Ser3 is inactive, then try Ser1
addeq \rp, \rp, #(0x00010000 - 0x00050000)
ldreq \rv, [\rp, #UTCR3]
tsteq \rv, #UTCR3_TXE
@ if Ser1 is inactive, then try Ser2
addeq \rp, \rp, #(0x00030000 - 0x00010000)
ldreq \rv, [\rp, #UTCR3]
tsteq \rv, #UTCR3_TXE
@ clear top bits, and generate both phys and virt addresses
lsl \rp, \rp, #8
lsr \rp, \rp, #8
orr \rv, \rp, #0xf8000000 @ virtual
orr \rp, \rp, #0x80000000 @ physical
.endm
.macro senduart,rd,rx
str \rd, [\rx, #UTDR]
.endm
.macro waituart,rd,rx
1001: ldr \rd, [\rx, #UTSR1]
tst \rd, #UTSR1_TNF
beq 1001b
.endm
.macro busyuart,rd,rx
1001: ldr \rd, [\rx, #UTSR1]
tst \rd, #UTSR1_TBY
bne 1001b
.endm