873673d302
When DRM support for Samsung SoC and Samsung S3C framebuffer support are selected, the kernel crashes as it does not get the required platform data. Change the compile macro to CONFIG_DRM_EXYNOS_FIMD to fix this. Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org> Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
446 lines
11 KiB
C
446 lines
11 KiB
C
/* linux/arch/arm/mach-exynos4/mach-smdkv310.c
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*
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* Copyright (c) 2010-2011 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/serial_core.h>
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#include <linux/delay.h>
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#include <linux/gpio.h>
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#include <linux/lcd.h>
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#include <linux/mmc/host.h>
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#include <linux/platform_device.h>
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#include <linux/smsc911x.h>
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#include <linux/io.h>
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#include <linux/i2c.h>
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#include <linux/input.h>
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#include <linux/pwm.h>
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#include <linux/pwm_backlight.h>
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#include <linux/platform_data/i2c-s3c2410.h>
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#include <linux/platform_data/s3c-hsotg.h>
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#include <linux/platform_data/usb-ehci-s5p.h>
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#include <linux/platform_data/usb-exynos.h>
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#include <asm/mach/arch.h>
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#include <asm/hardware/gic.h>
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#include <asm/mach-types.h>
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#include <video/platform_lcd.h>
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#include <video/samsung_fimd.h>
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#include <plat/regs-serial.h>
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#include <plat/regs-srom.h>
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#include <plat/cpu.h>
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#include <plat/devs.h>
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#include <plat/fb.h>
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#include <plat/keypad.h>
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#include <plat/sdhci.h>
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#include <plat/gpio-cfg.h>
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#include <plat/backlight.h>
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#include <plat/mfc.h>
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#include <plat/clock.h>
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#include <plat/hdmi.h>
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#include <mach/map.h>
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#include <drm/exynos_drm.h>
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#include "common.h"
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/* Following are default values for UCON, ULCON and UFCON UART registers */
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#define SMDKV310_UCON_DEFAULT (S3C2410_UCON_TXILEVEL | \
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S3C2410_UCON_RXILEVEL | \
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S3C2410_UCON_TXIRQMODE | \
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S3C2410_UCON_RXIRQMODE | \
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S3C2410_UCON_RXFIFO_TOI | \
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S3C2443_UCON_RXERR_IRQEN)
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#define SMDKV310_ULCON_DEFAULT S3C2410_LCON_CS8
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#define SMDKV310_UFCON_DEFAULT (S3C2410_UFCON_FIFOMODE | \
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S5PV210_UFCON_TXTRIG4 | \
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S5PV210_UFCON_RXTRIG4)
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static struct s3c2410_uartcfg smdkv310_uartcfgs[] __initdata = {
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[0] = {
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.hwport = 0,
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.flags = 0,
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.ucon = SMDKV310_UCON_DEFAULT,
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.ulcon = SMDKV310_ULCON_DEFAULT,
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.ufcon = SMDKV310_UFCON_DEFAULT,
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},
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[1] = {
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.hwport = 1,
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.flags = 0,
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.ucon = SMDKV310_UCON_DEFAULT,
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.ulcon = SMDKV310_ULCON_DEFAULT,
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.ufcon = SMDKV310_UFCON_DEFAULT,
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},
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[2] = {
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.hwport = 2,
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.flags = 0,
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.ucon = SMDKV310_UCON_DEFAULT,
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.ulcon = SMDKV310_ULCON_DEFAULT,
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.ufcon = SMDKV310_UFCON_DEFAULT,
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},
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[3] = {
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.hwport = 3,
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.flags = 0,
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.ucon = SMDKV310_UCON_DEFAULT,
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.ulcon = SMDKV310_ULCON_DEFAULT,
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.ufcon = SMDKV310_UFCON_DEFAULT,
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},
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};
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static struct s3c_sdhci_platdata smdkv310_hsmmc0_pdata __initdata = {
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.cd_type = S3C_SDHCI_CD_INTERNAL,
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#ifdef CONFIG_EXYNOS4_SDHCI_CH0_8BIT
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.max_width = 8,
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.host_caps = MMC_CAP_8_BIT_DATA,
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#endif
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};
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static struct s3c_sdhci_platdata smdkv310_hsmmc1_pdata __initdata = {
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.cd_type = S3C_SDHCI_CD_GPIO,
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.ext_cd_gpio = EXYNOS4_GPK0(2),
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.ext_cd_gpio_invert = 1,
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};
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static struct s3c_sdhci_platdata smdkv310_hsmmc2_pdata __initdata = {
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.cd_type = S3C_SDHCI_CD_INTERNAL,
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#ifdef CONFIG_EXYNOS4_SDHCI_CH2_8BIT
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.max_width = 8,
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.host_caps = MMC_CAP_8_BIT_DATA,
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#endif
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};
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static struct s3c_sdhci_platdata smdkv310_hsmmc3_pdata __initdata = {
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.cd_type = S3C_SDHCI_CD_GPIO,
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.ext_cd_gpio = EXYNOS4_GPK2(2),
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.ext_cd_gpio_invert = 1,
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};
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static void lcd_lte480wv_set_power(struct plat_lcd_data *pd,
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unsigned int power)
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{
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if (power) {
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#if !defined(CONFIG_BACKLIGHT_PWM)
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gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_HIGH, "GPD0");
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gpio_free(EXYNOS4_GPD0(1));
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#endif
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/* fire nRESET on power up */
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gpio_request_one(EXYNOS4_GPX0(6), GPIOF_OUT_INIT_HIGH, "GPX0");
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mdelay(100);
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gpio_set_value(EXYNOS4_GPX0(6), 0);
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mdelay(10);
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gpio_set_value(EXYNOS4_GPX0(6), 1);
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mdelay(10);
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gpio_free(EXYNOS4_GPX0(6));
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} else {
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#if !defined(CONFIG_BACKLIGHT_PWM)
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gpio_request_one(EXYNOS4_GPD0(1), GPIOF_OUT_INIT_LOW, "GPD0");
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gpio_free(EXYNOS4_GPD0(1));
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#endif
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}
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}
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static struct plat_lcd_data smdkv310_lcd_lte480wv_data = {
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.set_power = lcd_lte480wv_set_power,
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};
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static struct platform_device smdkv310_lcd_lte480wv = {
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.name = "platform-lcd",
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.dev.parent = &s5p_device_fimd0.dev,
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.dev.platform_data = &smdkv310_lcd_lte480wv_data,
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};
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#ifdef CONFIG_DRM_EXYNOS_FIMD
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static struct exynos_drm_fimd_pdata drm_fimd_pdata = {
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.panel = {
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.timing = {
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.left_margin = 13,
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.right_margin = 8,
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.upper_margin = 7,
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.lower_margin = 5,
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.hsync_len = 3,
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.vsync_len = 1,
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.xres = 800,
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.yres = 480,
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},
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},
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.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
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.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
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.default_win = 0,
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.bpp = 32,
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};
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#else
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static struct s3c_fb_pd_win smdkv310_fb_win0 = {
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.max_bpp = 32,
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.default_bpp = 24,
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.xres = 800,
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.yres = 480,
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};
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static struct fb_videomode smdkv310_lcd_timing = {
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.left_margin = 13,
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.right_margin = 8,
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.upper_margin = 7,
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.lower_margin = 5,
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.hsync_len = 3,
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.vsync_len = 1,
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.xres = 800,
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.yres = 480,
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};
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static struct s3c_fb_platdata smdkv310_lcd0_pdata __initdata = {
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.win[0] = &smdkv310_fb_win0,
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.vtiming = &smdkv310_lcd_timing,
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.vidcon0 = VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
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.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
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.setup_gpio = exynos4_fimd0_gpio_setup_24bpp,
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};
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#endif
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static struct resource smdkv310_smsc911x_resources[] = {
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[0] = DEFINE_RES_MEM(EXYNOS4_PA_SROM_BANK(1), SZ_64K),
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[1] = DEFINE_RES_NAMED(IRQ_EINT(5), 1, NULL, IORESOURCE_IRQ \
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| IRQF_TRIGGER_LOW),
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};
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static struct smsc911x_platform_config smsc9215_config = {
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.irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
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.irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
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.flags = SMSC911X_USE_16BIT | SMSC911X_FORCE_INTERNAL_PHY,
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.phy_interface = PHY_INTERFACE_MODE_MII,
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.mac = {0x00, 0x80, 0x00, 0x23, 0x45, 0x67},
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};
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static struct platform_device smdkv310_smsc911x = {
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.name = "smsc911x",
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.id = -1,
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.num_resources = ARRAY_SIZE(smdkv310_smsc911x_resources),
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.resource = smdkv310_smsc911x_resources,
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.dev = {
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.platform_data = &smsc9215_config,
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},
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};
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static uint32_t smdkv310_keymap[] __initdata = {
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/* KEY(row, col, keycode) */
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KEY(0, 3, KEY_1), KEY(0, 4, KEY_2), KEY(0, 5, KEY_3),
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KEY(0, 6, KEY_4), KEY(0, 7, KEY_5),
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KEY(1, 3, KEY_A), KEY(1, 4, KEY_B), KEY(1, 5, KEY_C),
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KEY(1, 6, KEY_D), KEY(1, 7, KEY_E)
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};
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static struct matrix_keymap_data smdkv310_keymap_data __initdata = {
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.keymap = smdkv310_keymap,
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.keymap_size = ARRAY_SIZE(smdkv310_keymap),
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};
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static struct samsung_keypad_platdata smdkv310_keypad_data __initdata = {
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.keymap_data = &smdkv310_keymap_data,
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.rows = 2,
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.cols = 8,
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};
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static struct i2c_board_info i2c_devs1[] __initdata = {
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{I2C_BOARD_INFO("wm8994", 0x1a),},
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};
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/* USB EHCI */
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static struct s5p_ehci_platdata smdkv310_ehci_pdata;
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static void __init smdkv310_ehci_init(void)
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{
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struct s5p_ehci_platdata *pdata = &smdkv310_ehci_pdata;
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s5p_ehci_set_platdata(pdata);
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}
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/* USB OHCI */
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static struct exynos4_ohci_platdata smdkv310_ohci_pdata;
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static void __init smdkv310_ohci_init(void)
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{
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struct exynos4_ohci_platdata *pdata = &smdkv310_ohci_pdata;
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exynos4_ohci_set_platdata(pdata);
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}
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/* USB OTG */
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static struct s3c_hsotg_plat smdkv310_hsotg_pdata;
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/* Audio device */
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static struct platform_device smdkv310_device_audio = {
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.name = "smdk-audio",
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.id = -1,
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};
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static struct platform_device *smdkv310_devices[] __initdata = {
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&s3c_device_hsmmc0,
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&s3c_device_hsmmc1,
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&s3c_device_hsmmc2,
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&s3c_device_hsmmc3,
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&s3c_device_i2c1,
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&s5p_device_i2c_hdmiphy,
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&s3c_device_rtc,
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&s3c_device_usb_hsotg,
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&s3c_device_wdt,
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&s5p_device_ehci,
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&s5p_device_fimc0,
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&s5p_device_fimc1,
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&s5p_device_fimc2,
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&s5p_device_fimc3,
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&s5p_device_fimc_md,
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&s5p_device_g2d,
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&s5p_device_jpeg,
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&exynos4_device_ac97,
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&exynos4_device_i2s0,
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&exynos4_device_ohci,
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&samsung_device_keypad,
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&s5p_device_mfc,
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&s5p_device_mfc_l,
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&s5p_device_mfc_r,
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&exynos4_device_spdif,
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&samsung_asoc_idma,
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&s5p_device_fimd0,
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&smdkv310_device_audio,
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&smdkv310_lcd_lte480wv,
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&smdkv310_smsc911x,
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&exynos4_device_ahci,
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&s5p_device_hdmi,
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&s5p_device_mixer,
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};
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static void __init smdkv310_smsc911x_init(void)
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{
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u32 cs1;
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/* configure nCS1 width to 16 bits */
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cs1 = __raw_readl(S5P_SROM_BW) &
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~(S5P_SROM_BW__CS_MASK << S5P_SROM_BW__NCS1__SHIFT);
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cs1 |= ((1 << S5P_SROM_BW__DATAWIDTH__SHIFT) |
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(1 << S5P_SROM_BW__WAITENABLE__SHIFT) |
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(1 << S5P_SROM_BW__BYTEENABLE__SHIFT)) <<
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S5P_SROM_BW__NCS1__SHIFT;
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__raw_writel(cs1, S5P_SROM_BW);
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/* set timing for nCS1 suitable for ethernet chip */
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__raw_writel((0x1 << S5P_SROM_BCX__PMC__SHIFT) |
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(0x9 << S5P_SROM_BCX__TACP__SHIFT) |
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(0xc << S5P_SROM_BCX__TCAH__SHIFT) |
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(0x1 << S5P_SROM_BCX__TCOH__SHIFT) |
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(0x6 << S5P_SROM_BCX__TACC__SHIFT) |
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(0x1 << S5P_SROM_BCX__TCOS__SHIFT) |
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(0x1 << S5P_SROM_BCX__TACS__SHIFT), S5P_SROM_BC1);
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}
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/* LCD Backlight data */
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static struct samsung_bl_gpio_info smdkv310_bl_gpio_info = {
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.no = EXYNOS4_GPD0(1),
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.func = S3C_GPIO_SFN(2),
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};
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static struct platform_pwm_backlight_data smdkv310_bl_data = {
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.pwm_id = 1,
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.pwm_period_ns = 1000,
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};
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/* I2C module and id for HDMIPHY */
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static struct i2c_board_info hdmiphy_info = {
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I2C_BOARD_INFO("hdmiphy-exynos4210", 0x38),
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};
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static struct pwm_lookup smdkv310_pwm_lookup[] = {
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PWM_LOOKUP("s3c24xx-pwm.1", 0, "pwm-backlight.0", NULL),
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};
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static void s5p_tv_setup(void)
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{
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/* direct HPD to HDMI chip */
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WARN_ON(gpio_request_one(EXYNOS4_GPX3(7), GPIOF_IN, "hpd-plug"));
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s3c_gpio_cfgpin(EXYNOS4_GPX3(7), S3C_GPIO_SFN(0x3));
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s3c_gpio_setpull(EXYNOS4_GPX3(7), S3C_GPIO_PULL_NONE);
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}
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static void __init smdkv310_map_io(void)
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{
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exynos_init_io(NULL, 0);
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s3c24xx_init_clocks(clk_xusbxti.rate);
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s3c24xx_init_uarts(smdkv310_uartcfgs, ARRAY_SIZE(smdkv310_uartcfgs));
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}
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static void __init smdkv310_reserve(void)
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{
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s5p_mfc_reserve_mem(0x43000000, 8 << 20, 0x51000000, 8 << 20);
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}
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static void __init smdkv310_machine_init(void)
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{
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s3c_i2c1_set_platdata(NULL);
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i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
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smdkv310_smsc911x_init();
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s3c_sdhci0_set_platdata(&smdkv310_hsmmc0_pdata);
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s3c_sdhci1_set_platdata(&smdkv310_hsmmc1_pdata);
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s3c_sdhci2_set_platdata(&smdkv310_hsmmc2_pdata);
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s3c_sdhci3_set_platdata(&smdkv310_hsmmc3_pdata);
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s5p_tv_setup();
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s5p_i2c_hdmiphy_set_platdata(NULL);
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s5p_hdmi_set_platdata(&hdmiphy_info, NULL, 0);
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samsung_keypad_set_platdata(&smdkv310_keypad_data);
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samsung_bl_set(&smdkv310_bl_gpio_info, &smdkv310_bl_data);
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pwm_add_table(smdkv310_pwm_lookup, ARRAY_SIZE(smdkv310_pwm_lookup));
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#ifdef CONFIG_DRM_EXYNOS_FIMD
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s5p_device_fimd0.dev.platform_data = &drm_fimd_pdata;
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exynos4_fimd0_gpio_setup_24bpp();
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#else
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s5p_fimd0_set_platdata(&smdkv310_lcd0_pdata);
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#endif
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smdkv310_ehci_init();
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smdkv310_ohci_init();
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s3c_hsotg_set_platdata(&smdkv310_hsotg_pdata);
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platform_add_devices(smdkv310_devices, ARRAY_SIZE(smdkv310_devices));
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}
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MACHINE_START(SMDKV310, "SMDKV310")
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/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
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/* Maintainer: Changhwan Youn <chaos.youn@samsung.com> */
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.atag_offset = 0x100,
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.smp = smp_ops(exynos_smp_ops),
|
|
.init_irq = exynos4_init_irq,
|
|
.map_io = smdkv310_map_io,
|
|
.handle_irq = gic_handle_irq,
|
|
.init_machine = smdkv310_machine_init,
|
|
.timer = &exynos4_timer,
|
|
.reserve = &smdkv310_reserve,
|
|
.restart = exynos4_restart,
|
|
MACHINE_END
|
|
|
|
MACHINE_START(SMDKC210, "SMDKC210")
|
|
/* Maintainer: Kukjin Kim <kgene.kim@samsung.com> */
|
|
.atag_offset = 0x100,
|
|
.smp = smp_ops(exynos_smp_ops),
|
|
.init_irq = exynos4_init_irq,
|
|
.map_io = smdkv310_map_io,
|
|
.handle_irq = gic_handle_irq,
|
|
.init_machine = smdkv310_machine_init,
|
|
.init_late = exynos_init_late,
|
|
.timer = &exynos4_timer,
|
|
.reserve = &smdkv310_reserve,
|
|
.restart = exynos4_restart,
|
|
MACHINE_END
|