David Ahern b5aff55d89 sparc: perf: Add support M7 processor ... The M7 processor has a different hypervisor group id and different PCR fast trap values. PIC read/write functions and PCR bit fields are the same as the T4 so those are reused. Signed-off-by: David Ahern <david.ahern@oracle.com> Acked-by: Bob Picco <bob.picco@oracle.com> Signed-off-by: David S. Miller <davem@davemloft.net>		2015-03-19 18:54:49 -07:00
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asm	sparc: perf: Add support M7 processor	2015-03-19 18:54:49 -07:00
uapi/asm	sparc: hook up execveat system call	2014-12-13 12:42:51 -08:00