linux/arch/powerpc/mm
Benjamin Herrenschmidt b98ac05d5e [POWERPC] 4xx: Deal with 44x virtually tagged icache
The 44x family has an interesting "feature" which is a virtually
tagged instruction cache (yuck !). So far, we haven't dealt with
it properly, which means we've been mostly lucky or people didn't
report the problems, unless people have been running custom patches
in their distro...

This is an attempt at fixing it properly. I chose to do it by
setting a global flag whenever we change a PTE that was previously
marked executable, and flush the entire instruction cache upon
return to user space when that happens.

This is a bit heavy handed, but it's hard to do more fine grained
flushes as the icbi instruction, on those processor, for some very
strange reasons (since the cache is virtually mapped) still requires
a valid TLB entry for reading in the target address space, which
isn't something I want to deal with.

Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Josh Boyer <jwboyer@linux.vnet.ibm.com>
2007-11-01 07:15:30 -05:00
..
40x_mmu.c [POWERPC] 40x MMU 2007-08-20 07:28:48 -05:00
44x_mmu.c [POWERPC] 4xx: Deal with 44x virtually tagged icache 2007-11-01 07:15:30 -05:00
fault.c [POWERPC] 4xx: Fix 4xx flush_tlb_page() 2007-11-01 07:15:09 -05:00
fsl_booke_mmu.c [POWERPC] 85xx: Failure with odd memory sizes and CONFIG_HIGHMEM 2007-10-08 08:38:34 -05:00
hash_low_32.S [POWERPC] Fix COMMON symbol warnings 2007-05-17 21:10:15 +10:00
hash_low_64.S [POWERPC] Use 1TB segments 2007-10-12 14:05:17 +10:00
hash_native_64.c [POWERPC] Use 1TB segments 2007-10-12 14:05:17 +10:00
hash_utils_64.c [POWERPC] Add 1TB workaround for PA6T 2007-10-17 22:30:09 +10:00
hugetlbpage.c Slab API: remove useless ctor parameter and reorder parameters 2007-10-17 08:42:45 -07:00
init_32.c [POWERPC] 8xx: Set initial memory limit. 2007-10-03 20:36:36 -05:00
init_64.c Merge branch 'merge' of git://git.kernel.org/pub/scm/linux/kernel/git/paulus/powerpc 2007-10-17 09:05:55 -07:00
lmb.c [POWERPC] Fix loop with unsigned long counter variable 2007-07-26 16:12:17 +10:00
Makefile [POWERPC] Create and use CONFIG_WORD_SIZE 2007-10-03 09:12:02 +10:00
mem.c fix memory hot remove not configured case. 2007-10-16 09:43:02 -07:00
mmap.c Detach sched.h from mm.h 2007-05-21 09:18:19 -07:00
mmu_context_32.c [POWERPC] Remove the dregs of APUS support from arch/powerpc 2007-06-14 22:30:15 +10:00
mmu_context_64.c [POWERPC] Tidy up CONFIG_PPC_MM_SLICES code 2007-08-17 11:01:59 +10:00
mmu_decl.h [POWERPC] 4xx: Fix 4xx flush_tlb_page() 2007-11-01 07:15:09 -05:00
numa.c [POWERPC] Fix parse_drconf_memory() for 64-bit start addresses 2007-08-03 19:36:00 +10:00
pgtable_32.c [POWERPC] Remove a couple of unused definitions from pgtable_32.c 2007-06-14 22:30:15 +10:00
pgtable_64.c [POWERPC] Use 1TB segments 2007-10-12 14:05:17 +10:00
ppc_mmu_32.c [POWERPC] Kill typedef-ed structs for hash PTEs and BATs 2007-06-14 22:30:16 +10:00
slb_low.S [POWERPC] Use 1TB segments 2007-10-12 14:05:17 +10:00
slb.c [POWERPC] Add 1TB workaround for PA6T 2007-10-17 22:30:09 +10:00
slice.c spin_lock_unlocked cleanups 2007-10-17 08:43:01 -07:00
stab.c [POWERPC] Use 1TB segments 2007-10-12 14:05:17 +10:00
tlb_32.c powerpc: tlb_32.c build fix 2007-07-21 17:49:16 -07:00
tlb_64.c [POWERPC] Use 1TB segments 2007-10-12 14:05:17 +10:00