f080480488
side: the HV and emulation flavors can now coexist in a single kernel is probably the most interesting change from a user point of view. On the x86 side there are nested virtualization improvements and a few bugfixes. ARM got transparent huge page support, improved overcommit, and support for big endian guests. Finally, there is a new interface to connect KVM with VFIO. This helps with devices that use NoSnoop PCI transactions, letting the driver in the guest execute WBINVD instructions. This includes some nVidia cards on Windows, that fail to start without these patches and the corresponding userspace changes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v2.0.22 (GNU/Linux) iQIcBAABAgAGBQJShPAhAAoJEBvWZb6bTYbyl48P/297GgmELHAGBgjvb6q7yyGu L8+eHjKbh4XBAkPwyzbvUjuww5z2hM0N3JQ0BDV9oeXlO+zwwCEns/sg2Q5/NJXq XxnTeShaKnp9lqVBnE6G9rAOUWKoyLJ2wItlvUL8JlaO9xJ0Vmk0ta4n2Nv5GqDp db6UD7vju6rHtIAhNpvvAO51kAOwc01xxRixCVb7KUYOnmO9nvpixzoI/S0Rp1gu w/OWMfCosDzBoT+cOe79Yx1OKcpaVW94X6CH1s+ShCw3wcbCL2f13Ka8/E3FIcuq vkZaLBxio7vjUAHRjPObw0XBW4InXEbhI1DjzIvm8dmc4VsgmtLQkTCG8fj+jINc dlHQUq6Do+1F4zy6WMBUj8tNeP1Z9DsABp98rQwR8+BwHoQpGQBpAxW0TE0ZMngC t1caqyvjZ5pPpFUxSrAV+8Kg4AvobXPYOim0vqV7Qea07KhFcBXLCfF7BWdwq/Jc 0CAOlsLL4mHGIQWZJuVGw0YGP7oATDCyewlBuDObx+szYCoV4fQGZVBEL0KwJx/1 7lrLN7JWzRyw6xTgJ5VVwgYE1tUY4IFQcHu7/5N+dw8/xg9KWA3f4PeMavIKSf+R qteewbtmQsxUnvuQIBHLs8NRWPnBPy+F3Sc2ckeOLIe4pmfTte6shtTXcLDL+LqH NTmT/cfmYp2BRkiCfCiS =rWNf -----END PGP SIGNATURE----- Merge tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm Pull KVM changes from Paolo Bonzini: "Here are the 3.13 KVM changes. There was a lot of work on the PPC side: the HV and emulation flavors can now coexist in a single kernel is probably the most interesting change from a user point of view. On the x86 side there are nested virtualization improvements and a few bugfixes. ARM got transparent huge page support, improved overcommit, and support for big endian guests. Finally, there is a new interface to connect KVM with VFIO. This helps with devices that use NoSnoop PCI transactions, letting the driver in the guest execute WBINVD instructions. This includes some nVidia cards on Windows, that fail to start without these patches and the corresponding userspace changes" * tag 'for-linus' of git://git.kernel.org/pub/scm/virt/kvm/kvm: (146 commits) kvm, vmx: Fix lazy FPU on nested guest arm/arm64: KVM: PSCI: propagate caller endianness to the incoming vcpu arm/arm64: KVM: MMIO support for BE guest kvm, cpuid: Fix sparse warning kvm: Delete prototype for non-existent function kvm_check_iopl kvm: Delete prototype for non-existent function complete_pio hung_task: add method to reset detector pvclock: detect watchdog reset at pvclock read kvm: optimize out smp_mb after srcu_read_unlock srcu: API for barrier after srcu read unlock KVM: remove vm mmap method KVM: IOMMU: hva align mapping page size KVM: x86: trace cpuid emulation when called from emulator KVM: emulator: cleanup decode_register_operand() a bit KVM: emulator: check rex prefix inside decode_register() KVM: x86: fix emulation of "movzbl %bpl, %eax" kvm_host: typo fix KVM: x86: emulate SAHF instruction MAINTAINERS: add tree for kvm.git Documentation/kvm: add a 00-INDEX file ...
680 lines
31 KiB
C
680 lines
31 KiB
C
/*
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* This program is used to generate definitions needed by
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* assembly language modules.
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*
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* We use the technique used in the OSF Mach kernel code:
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* generate asm statements containing #defines,
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* compile this file to assembler, and then extract the
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* #defines from the assembly-language output.
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License
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* as published by the Free Software Foundation; either version
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* 2 of the License, or (at your option) any later version.
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*/
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#include <linux/signal.h>
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#include <linux/sched.h>
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#include <linux/kernel.h>
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#include <linux/errno.h>
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#include <linux/string.h>
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#include <linux/types.h>
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#include <linux/mman.h>
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#include <linux/mm.h>
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#include <linux/suspend.h>
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#include <linux/hrtimer.h>
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#ifdef CONFIG_PPC64
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#include <linux/time.h>
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#include <linux/hardirq.h>
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#endif
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#include <linux/kbuild.h>
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#include <asm/io.h>
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#include <asm/page.h>
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#include <asm/pgtable.h>
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#include <asm/processor.h>
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#include <asm/cputable.h>
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#include <asm/thread_info.h>
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#include <asm/rtas.h>
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#include <asm/vdso_datapage.h>
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#ifdef CONFIG_PPC64
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#include <asm/paca.h>
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#include <asm/lppaca.h>
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#include <asm/cache.h>
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#include <asm/compat.h>
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#include <asm/mmu.h>
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#include <asm/hvcall.h>
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#include <asm/xics.h>
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#endif
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#ifdef CONFIG_PPC_POWERNV
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#include <asm/opal.h>
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#endif
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#if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
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#include <linux/kvm_host.h>
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#endif
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#if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
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#include <asm/kvm_book3s.h>
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#endif
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#ifdef CONFIG_PPC32
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#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
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#include "head_booke.h"
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#endif
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#endif
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#if defined(CONFIG_PPC_FSL_BOOK3E)
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#include "../mm/mmu_decl.h"
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#endif
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int main(void)
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{
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DEFINE(THREAD, offsetof(struct task_struct, thread));
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DEFINE(MM, offsetof(struct task_struct, mm));
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DEFINE(MMCONTEXTID, offsetof(struct mm_struct, context.id));
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#ifdef CONFIG_PPC64
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DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
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DEFINE(SIGSEGV, SIGSEGV);
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DEFINE(NMI_MASK, NMI_MASK);
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DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr));
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DEFINE(THREAD_DSCR_INHERIT, offsetof(struct thread_struct, dscr_inherit));
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DEFINE(TASKTHREADPPR, offsetof(struct task_struct, thread.ppr));
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#else
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DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
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DEFINE(THREAD_INFO_GAP, _ALIGN_UP(sizeof(struct thread_info), 16));
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DEFINE(KSP_LIMIT, offsetof(struct thread_struct, ksp_limit));
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#endif /* CONFIG_PPC64 */
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DEFINE(KSP, offsetof(struct thread_struct, ksp));
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DEFINE(PT_REGS, offsetof(struct thread_struct, regs));
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#ifdef CONFIG_BOOKE
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DEFINE(THREAD_NORMSAVES, offsetof(struct thread_struct, normsave[0]));
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#endif
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DEFINE(THREAD_FPEXC_MODE, offsetof(struct thread_struct, fpexc_mode));
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DEFINE(THREAD_FPSTATE, offsetof(struct thread_struct, fp_state));
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DEFINE(THREAD_FPSAVEAREA, offsetof(struct thread_struct, fp_save_area));
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DEFINE(FPSTATE_FPSCR, offsetof(struct thread_fp_state, fpscr));
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#ifdef CONFIG_ALTIVEC
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DEFINE(THREAD_VRSTATE, offsetof(struct thread_struct, vr_state));
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DEFINE(THREAD_VRSAVEAREA, offsetof(struct thread_struct, vr_save_area));
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DEFINE(THREAD_VRSAVE, offsetof(struct thread_struct, vrsave));
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DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
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DEFINE(VRSTATE_VSCR, offsetof(struct thread_vr_state, vscr));
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#endif /* CONFIG_ALTIVEC */
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#ifdef CONFIG_VSX
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DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
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#endif /* CONFIG_VSX */
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#ifdef CONFIG_PPC64
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DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
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#else /* CONFIG_PPC64 */
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DEFINE(PGDIR, offsetof(struct thread_struct, pgdir));
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#ifdef CONFIG_SPE
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DEFINE(THREAD_EVR0, offsetof(struct thread_struct, evr[0]));
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DEFINE(THREAD_ACC, offsetof(struct thread_struct, acc));
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DEFINE(THREAD_SPEFSCR, offsetof(struct thread_struct, spefscr));
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DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe));
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#endif /* CONFIG_SPE */
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#endif /* CONFIG_PPC64 */
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#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
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DEFINE(THREAD_DBCR0, offsetof(struct thread_struct, debug.dbcr0));
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#endif
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#ifdef CONFIG_KVM_BOOK3S_32_HANDLER
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DEFINE(THREAD_KVM_SVCPU, offsetof(struct thread_struct, kvm_shadow_vcpu));
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#endif
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#if defined(CONFIG_KVM) && defined(CONFIG_BOOKE)
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DEFINE(THREAD_KVM_VCPU, offsetof(struct thread_struct, kvm_vcpu));
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#endif
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#ifdef CONFIG_PPC_BOOK3S_64
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DEFINE(THREAD_TAR, offsetof(struct thread_struct, tar));
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DEFINE(THREAD_BESCR, offsetof(struct thread_struct, bescr));
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DEFINE(THREAD_EBBHR, offsetof(struct thread_struct, ebbhr));
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DEFINE(THREAD_EBBRR, offsetof(struct thread_struct, ebbrr));
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DEFINE(THREAD_SIAR, offsetof(struct thread_struct, siar));
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DEFINE(THREAD_SDAR, offsetof(struct thread_struct, sdar));
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DEFINE(THREAD_SIER, offsetof(struct thread_struct, sier));
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DEFINE(THREAD_MMCR0, offsetof(struct thread_struct, mmcr0));
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DEFINE(THREAD_MMCR2, offsetof(struct thread_struct, mmcr2));
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#endif
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#ifdef CONFIG_PPC_TRANSACTIONAL_MEM
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DEFINE(PACATMSCRATCH, offsetof(struct paca_struct, tm_scratch));
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DEFINE(THREAD_TM_TFHAR, offsetof(struct thread_struct, tm_tfhar));
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DEFINE(THREAD_TM_TEXASR, offsetof(struct thread_struct, tm_texasr));
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DEFINE(THREAD_TM_TFIAR, offsetof(struct thread_struct, tm_tfiar));
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DEFINE(THREAD_TM_TAR, offsetof(struct thread_struct, tm_tar));
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DEFINE(THREAD_TM_PPR, offsetof(struct thread_struct, tm_ppr));
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DEFINE(THREAD_TM_DSCR, offsetof(struct thread_struct, tm_dscr));
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DEFINE(PT_CKPT_REGS, offsetof(struct thread_struct, ckpt_regs));
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DEFINE(THREAD_TRANSACT_VRSTATE, offsetof(struct thread_struct,
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transact_vr));
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DEFINE(THREAD_TRANSACT_VRSAVE, offsetof(struct thread_struct,
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transact_vrsave));
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DEFINE(THREAD_TRANSACT_FPSTATE, offsetof(struct thread_struct,
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transact_fp));
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/* Local pt_regs on stack for Transactional Memory funcs. */
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DEFINE(TM_FRAME_SIZE, STACK_FRAME_OVERHEAD +
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sizeof(struct pt_regs) + 16);
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#endif /* CONFIG_PPC_TRANSACTIONAL_MEM */
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DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
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DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
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DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
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DEFINE(TI_TASK, offsetof(struct thread_info, task));
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DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
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#ifdef CONFIG_PPC64
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DEFINE(DCACHEL1LINESIZE, offsetof(struct ppc64_caches, dline_size));
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DEFINE(DCACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_dline_size));
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DEFINE(DCACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, dlines_per_page));
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DEFINE(ICACHEL1LINESIZE, offsetof(struct ppc64_caches, iline_size));
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DEFINE(ICACHEL1LOGLINESIZE, offsetof(struct ppc64_caches, log_iline_size));
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DEFINE(ICACHEL1LINESPERPAGE, offsetof(struct ppc64_caches, ilines_per_page));
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/* paca */
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DEFINE(PACA_SIZE, sizeof(struct paca_struct));
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DEFINE(PACA_LOCK_TOKEN, offsetof(struct paca_struct, lock_token));
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DEFINE(PACAPACAINDEX, offsetof(struct paca_struct, paca_index));
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DEFINE(PACAPROCSTART, offsetof(struct paca_struct, cpu_start));
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DEFINE(PACAKSAVE, offsetof(struct paca_struct, kstack));
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DEFINE(PACACURRENT, offsetof(struct paca_struct, __current));
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DEFINE(PACASAVEDMSR, offsetof(struct paca_struct, saved_msr));
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DEFINE(PACASTABRR, offsetof(struct paca_struct, stab_rr));
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DEFINE(PACAR1, offsetof(struct paca_struct, saved_r1));
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DEFINE(PACATOC, offsetof(struct paca_struct, kernel_toc));
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DEFINE(PACAKBASE, offsetof(struct paca_struct, kernelbase));
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DEFINE(PACAKMSR, offsetof(struct paca_struct, kernel_msr));
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DEFINE(PACASOFTIRQEN, offsetof(struct paca_struct, soft_enabled));
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DEFINE(PACAIRQHAPPENED, offsetof(struct paca_struct, irq_happened));
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DEFINE(PACACONTEXTID, offsetof(struct paca_struct, context.id));
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#ifdef CONFIG_PPC_MM_SLICES
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DEFINE(PACALOWSLICESPSIZE, offsetof(struct paca_struct,
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context.low_slices_psize));
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DEFINE(PACAHIGHSLICEPSIZE, offsetof(struct paca_struct,
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context.high_slices_psize));
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DEFINE(MMUPSIZEDEFSIZE, sizeof(struct mmu_psize_def));
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#endif /* CONFIG_PPC_MM_SLICES */
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#ifdef CONFIG_PPC_BOOK3E
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DEFINE(PACAPGD, offsetof(struct paca_struct, pgd));
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DEFINE(PACA_KERNELPGD, offsetof(struct paca_struct, kernel_pgd));
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DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
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DEFINE(PACA_EXTLB, offsetof(struct paca_struct, extlb));
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DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
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DEFINE(PACA_EXCRIT, offsetof(struct paca_struct, excrit));
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DEFINE(PACA_EXDBG, offsetof(struct paca_struct, exdbg));
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DEFINE(PACA_MC_STACK, offsetof(struct paca_struct, mc_kstack));
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DEFINE(PACA_CRIT_STACK, offsetof(struct paca_struct, crit_kstack));
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DEFINE(PACA_DBG_STACK, offsetof(struct paca_struct, dbg_kstack));
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#endif /* CONFIG_PPC_BOOK3E */
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#ifdef CONFIG_PPC_STD_MMU_64
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DEFINE(PACASTABREAL, offsetof(struct paca_struct, stab_real));
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DEFINE(PACASTABVIRT, offsetof(struct paca_struct, stab_addr));
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DEFINE(PACASLBCACHE, offsetof(struct paca_struct, slb_cache));
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DEFINE(PACASLBCACHEPTR, offsetof(struct paca_struct, slb_cache_ptr));
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DEFINE(PACAVMALLOCSLLP, offsetof(struct paca_struct, vmalloc_sllp));
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#ifdef CONFIG_PPC_MM_SLICES
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DEFINE(MMUPSIZESLLP, offsetof(struct mmu_psize_def, sllp));
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#else
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DEFINE(PACACONTEXTSLLP, offsetof(struct paca_struct, context.sllp));
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#endif /* CONFIG_PPC_MM_SLICES */
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DEFINE(PACA_EXGEN, offsetof(struct paca_struct, exgen));
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DEFINE(PACA_EXMC, offsetof(struct paca_struct, exmc));
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DEFINE(PACA_EXSLB, offsetof(struct paca_struct, exslb));
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DEFINE(PACALPPACAPTR, offsetof(struct paca_struct, lppaca_ptr));
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DEFINE(PACA_SLBSHADOWPTR, offsetof(struct paca_struct, slb_shadow_ptr));
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DEFINE(SLBSHADOW_STACKVSID,
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offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid));
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DEFINE(SLBSHADOW_STACKESID,
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offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid));
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DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area));
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DEFINE(LPPACA_PMCINUSE, offsetof(struct lppaca, pmcregs_in_use));
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DEFINE(LPPACA_DTLIDX, offsetof(struct lppaca, dtl_idx));
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DEFINE(LPPACA_YIELDCOUNT, offsetof(struct lppaca, yield_count));
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DEFINE(PACA_DTL_RIDX, offsetof(struct paca_struct, dtl_ridx));
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#endif /* CONFIG_PPC_STD_MMU_64 */
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DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
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DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
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DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state));
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DEFINE(PACA_STARTTIME, offsetof(struct paca_struct, starttime));
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DEFINE(PACA_STARTTIME_USER, offsetof(struct paca_struct, starttime_user));
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DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));
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DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));
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DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
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DEFINE(PACA_NAPSTATELOST, offsetof(struct paca_struct, nap_state_lost));
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DEFINE(PACA_SPRG3, offsetof(struct paca_struct, sprg3));
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#endif /* CONFIG_PPC64 */
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/* RTAS */
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DEFINE(RTASBASE, offsetof(struct rtas_t, base));
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DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
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/* Interrupt register frame */
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DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
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DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
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#ifdef CONFIG_PPC64
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/* Create extra stack space for SRR0 and SRR1 when calling prom/rtas. */
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DEFINE(PROM_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
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DEFINE(RTAS_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs) + 16);
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/* hcall statistics */
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DEFINE(HCALL_STAT_SIZE, sizeof(struct hcall_stats));
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DEFINE(HCALL_STAT_CALLS, offsetof(struct hcall_stats, num_calls));
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DEFINE(HCALL_STAT_TB, offsetof(struct hcall_stats, tb_total));
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DEFINE(HCALL_STAT_PURR, offsetof(struct hcall_stats, purr_total));
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#endif /* CONFIG_PPC64 */
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DEFINE(GPR0, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[0]));
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DEFINE(GPR1, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[1]));
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DEFINE(GPR2, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[2]));
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DEFINE(GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[3]));
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DEFINE(GPR4, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[4]));
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DEFINE(GPR5, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[5]));
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DEFINE(GPR6, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[6]));
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DEFINE(GPR7, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[7]));
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DEFINE(GPR8, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[8]));
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DEFINE(GPR9, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[9]));
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DEFINE(GPR10, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[10]));
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DEFINE(GPR11, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[11]));
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DEFINE(GPR12, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[12]));
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DEFINE(GPR13, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[13]));
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#ifndef CONFIG_PPC64
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DEFINE(GPR14, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[14]));
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DEFINE(GPR15, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[15]));
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DEFINE(GPR16, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[16]));
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DEFINE(GPR17, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[17]));
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DEFINE(GPR18, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[18]));
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DEFINE(GPR19, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[19]));
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DEFINE(GPR20, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[20]));
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DEFINE(GPR21, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[21]));
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DEFINE(GPR22, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[22]));
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DEFINE(GPR23, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[23]));
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DEFINE(GPR24, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[24]));
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DEFINE(GPR25, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[25]));
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|
DEFINE(GPR26, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[26]));
|
|
DEFINE(GPR27, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[27]));
|
|
DEFINE(GPR28, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[28]));
|
|
DEFINE(GPR29, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[29]));
|
|
DEFINE(GPR30, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[30]));
|
|
DEFINE(GPR31, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, gpr[31]));
|
|
#endif /* CONFIG_PPC64 */
|
|
/*
|
|
* Note: these symbols include _ because they overlap with special
|
|
* register names
|
|
*/
|
|
DEFINE(_NIP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, nip));
|
|
DEFINE(_MSR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, msr));
|
|
DEFINE(_CTR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ctr));
|
|
DEFINE(_LINK, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, link));
|
|
DEFINE(_CCR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, ccr));
|
|
DEFINE(_XER, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, xer));
|
|
DEFINE(_DAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
|
|
DEFINE(_DSISR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
|
|
DEFINE(ORIG_GPR3, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, orig_gpr3));
|
|
DEFINE(RESULT, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, result));
|
|
DEFINE(_TRAP, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, trap));
|
|
#ifndef CONFIG_PPC64
|
|
DEFINE(_MQ, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, mq));
|
|
/*
|
|
* The PowerPC 400-class & Book-E processors have neither the DAR
|
|
* nor the DSISR SPRs. Hence, we overload them to hold the similar
|
|
* DEAR and ESR SPRs for such processors. For critical interrupts
|
|
* we use them to hold SRR0 and SRR1.
|
|
*/
|
|
DEFINE(_DEAR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dar));
|
|
DEFINE(_ESR, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, dsisr));
|
|
#else /* CONFIG_PPC64 */
|
|
DEFINE(SOFTE, STACK_FRAME_OVERHEAD+offsetof(struct pt_regs, softe));
|
|
|
|
/* These _only_ to be used with {PROM,RTAS}_FRAME_SIZE!!! */
|
|
DEFINE(_SRR0, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs));
|
|
DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
|
|
#endif /* CONFIG_PPC64 */
|
|
|
|
#if defined(CONFIG_PPC32)
|
|
#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
|
|
DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
|
|
DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
|
|
/* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
|
|
DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
|
|
DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
|
|
DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
|
|
DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
|
|
DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
|
|
DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
|
|
DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
|
|
DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
|
|
DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
|
|
DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
|
|
DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
|
|
DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
|
|
DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
|
|
#endif
|
|
#endif
|
|
DEFINE(CLONE_VM, CLONE_VM);
|
|
DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
|
|
|
|
#ifndef CONFIG_PPC64
|
|
DEFINE(MM_PGD, offsetof(struct mm_struct, pgd));
|
|
#endif /* ! CONFIG_PPC64 */
|
|
|
|
/* About the CPU features table */
|
|
DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
|
|
DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
|
|
DEFINE(CPU_SPEC_RESTORE, offsetof(struct cpu_spec, cpu_restore));
|
|
|
|
DEFINE(pbe_address, offsetof(struct pbe, address));
|
|
DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
|
|
DEFINE(pbe_next, offsetof(struct pbe, next));
|
|
|
|
#ifndef CONFIG_PPC64
|
|
DEFINE(TASK_SIZE, TASK_SIZE);
|
|
DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
|
|
#endif /* ! CONFIG_PPC64 */
|
|
|
|
/* datapage offsets for use by vdso */
|
|
DEFINE(CFG_TB_ORIG_STAMP, offsetof(struct vdso_data, tb_orig_stamp));
|
|
DEFINE(CFG_TB_TICKS_PER_SEC, offsetof(struct vdso_data, tb_ticks_per_sec));
|
|
DEFINE(CFG_TB_TO_XS, offsetof(struct vdso_data, tb_to_xs));
|
|
DEFINE(CFG_STAMP_XSEC, offsetof(struct vdso_data, stamp_xsec));
|
|
DEFINE(CFG_TB_UPDATE_COUNT, offsetof(struct vdso_data, tb_update_count));
|
|
DEFINE(CFG_TZ_MINUTEWEST, offsetof(struct vdso_data, tz_minuteswest));
|
|
DEFINE(CFG_TZ_DSTTIME, offsetof(struct vdso_data, tz_dsttime));
|
|
DEFINE(CFG_SYSCALL_MAP32, offsetof(struct vdso_data, syscall_map_32));
|
|
DEFINE(WTOM_CLOCK_SEC, offsetof(struct vdso_data, wtom_clock_sec));
|
|
DEFINE(WTOM_CLOCK_NSEC, offsetof(struct vdso_data, wtom_clock_nsec));
|
|
DEFINE(STAMP_XTIME, offsetof(struct vdso_data, stamp_xtime));
|
|
DEFINE(STAMP_SEC_FRAC, offsetof(struct vdso_data, stamp_sec_fraction));
|
|
DEFINE(CFG_ICACHE_BLOCKSZ, offsetof(struct vdso_data, icache_block_size));
|
|
DEFINE(CFG_DCACHE_BLOCKSZ, offsetof(struct vdso_data, dcache_block_size));
|
|
DEFINE(CFG_ICACHE_LOGBLOCKSZ, offsetof(struct vdso_data, icache_log_block_size));
|
|
DEFINE(CFG_DCACHE_LOGBLOCKSZ, offsetof(struct vdso_data, dcache_log_block_size));
|
|
#ifdef CONFIG_PPC64
|
|
DEFINE(CFG_SYSCALL_MAP64, offsetof(struct vdso_data, syscall_map_64));
|
|
DEFINE(TVAL64_TV_SEC, offsetof(struct timeval, tv_sec));
|
|
DEFINE(TVAL64_TV_USEC, offsetof(struct timeval, tv_usec));
|
|
DEFINE(TVAL32_TV_SEC, offsetof(struct compat_timeval, tv_sec));
|
|
DEFINE(TVAL32_TV_USEC, offsetof(struct compat_timeval, tv_usec));
|
|
DEFINE(TSPC64_TV_SEC, offsetof(struct timespec, tv_sec));
|
|
DEFINE(TSPC64_TV_NSEC, offsetof(struct timespec, tv_nsec));
|
|
DEFINE(TSPC32_TV_SEC, offsetof(struct compat_timespec, tv_sec));
|
|
DEFINE(TSPC32_TV_NSEC, offsetof(struct compat_timespec, tv_nsec));
|
|
#else
|
|
DEFINE(TVAL32_TV_SEC, offsetof(struct timeval, tv_sec));
|
|
DEFINE(TVAL32_TV_USEC, offsetof(struct timeval, tv_usec));
|
|
DEFINE(TSPC32_TV_SEC, offsetof(struct timespec, tv_sec));
|
|
DEFINE(TSPC32_TV_NSEC, offsetof(struct timespec, tv_nsec));
|
|
#endif
|
|
/* timeval/timezone offsets for use by vdso */
|
|
DEFINE(TZONE_TZ_MINWEST, offsetof(struct timezone, tz_minuteswest));
|
|
DEFINE(TZONE_TZ_DSTTIME, offsetof(struct timezone, tz_dsttime));
|
|
|
|
/* Other bits used by the vdso */
|
|
DEFINE(CLOCK_REALTIME, CLOCK_REALTIME);
|
|
DEFINE(CLOCK_MONOTONIC, CLOCK_MONOTONIC);
|
|
DEFINE(NSEC_PER_SEC, NSEC_PER_SEC);
|
|
DEFINE(CLOCK_REALTIME_RES, MONOTONIC_RES_NSEC);
|
|
|
|
#ifdef CONFIG_BUG
|
|
DEFINE(BUG_ENTRY_SIZE, sizeof(struct bug_entry));
|
|
#endif
|
|
|
|
DEFINE(PGD_TABLE_SIZE, PGD_TABLE_SIZE);
|
|
DEFINE(PTE_SIZE, sizeof(pte_t));
|
|
|
|
#ifdef CONFIG_KVM
|
|
DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
|
|
DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
|
|
DEFINE(VCPU_GUEST_PID, offsetof(struct kvm_vcpu, arch.pid));
|
|
DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
|
|
DEFINE(VCPU_VRSAVE, offsetof(struct kvm_vcpu, arch.vrsave));
|
|
DEFINE(VCPU_FPRS, offsetof(struct kvm_vcpu, arch.fpr));
|
|
DEFINE(VCPU_FPSCR, offsetof(struct kvm_vcpu, arch.fpscr));
|
|
#ifdef CONFIG_ALTIVEC
|
|
DEFINE(VCPU_VRS, offsetof(struct kvm_vcpu, arch.vr));
|
|
DEFINE(VCPU_VSCR, offsetof(struct kvm_vcpu, arch.vscr));
|
|
#endif
|
|
#ifdef CONFIG_VSX
|
|
DEFINE(VCPU_VSRS, offsetof(struct kvm_vcpu, arch.vsr));
|
|
#endif
|
|
DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
|
|
DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
|
|
DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
|
|
DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
|
|
DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
|
|
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
|
|
DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.shregs.msr));
|
|
DEFINE(VCPU_SRR0, offsetof(struct kvm_vcpu, arch.shregs.srr0));
|
|
DEFINE(VCPU_SRR1, offsetof(struct kvm_vcpu, arch.shregs.srr1));
|
|
DEFINE(VCPU_SPRG0, offsetof(struct kvm_vcpu, arch.shregs.sprg0));
|
|
DEFINE(VCPU_SPRG1, offsetof(struct kvm_vcpu, arch.shregs.sprg1));
|
|
DEFINE(VCPU_SPRG2, offsetof(struct kvm_vcpu, arch.shregs.sprg2));
|
|
DEFINE(VCPU_SPRG3, offsetof(struct kvm_vcpu, arch.shregs.sprg3));
|
|
#endif
|
|
DEFINE(VCPU_SHARED_SPRG3, offsetof(struct kvm_vcpu_arch_shared, sprg3));
|
|
DEFINE(VCPU_SHARED_SPRG4, offsetof(struct kvm_vcpu_arch_shared, sprg4));
|
|
DEFINE(VCPU_SHARED_SPRG5, offsetof(struct kvm_vcpu_arch_shared, sprg5));
|
|
DEFINE(VCPU_SHARED_SPRG6, offsetof(struct kvm_vcpu_arch_shared, sprg6));
|
|
DEFINE(VCPU_SHARED_SPRG7, offsetof(struct kvm_vcpu_arch_shared, sprg7));
|
|
DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));
|
|
DEFINE(VCPU_SHADOW_PID1, offsetof(struct kvm_vcpu, arch.shadow_pid1));
|
|
DEFINE(VCPU_SHARED, offsetof(struct kvm_vcpu, arch.shared));
|
|
DEFINE(VCPU_SHARED_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
|
|
DEFINE(VCPU_SHADOW_MSR, offsetof(struct kvm_vcpu, arch.shadow_msr));
|
|
|
|
DEFINE(VCPU_SHARED_MAS0, offsetof(struct kvm_vcpu_arch_shared, mas0));
|
|
DEFINE(VCPU_SHARED_MAS1, offsetof(struct kvm_vcpu_arch_shared, mas1));
|
|
DEFINE(VCPU_SHARED_MAS2, offsetof(struct kvm_vcpu_arch_shared, mas2));
|
|
DEFINE(VCPU_SHARED_MAS7_3, offsetof(struct kvm_vcpu_arch_shared, mas7_3));
|
|
DEFINE(VCPU_SHARED_MAS4, offsetof(struct kvm_vcpu_arch_shared, mas4));
|
|
DEFINE(VCPU_SHARED_MAS6, offsetof(struct kvm_vcpu_arch_shared, mas6));
|
|
|
|
DEFINE(VCPU_KVM, offsetof(struct kvm_vcpu, kvm));
|
|
DEFINE(KVM_LPID, offsetof(struct kvm, arch.lpid));
|
|
|
|
/* book3s */
|
|
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
|
|
DEFINE(KVM_SDR1, offsetof(struct kvm, arch.sdr1));
|
|
DEFINE(KVM_HOST_LPID, offsetof(struct kvm, arch.host_lpid));
|
|
DEFINE(KVM_HOST_LPCR, offsetof(struct kvm, arch.host_lpcr));
|
|
DEFINE(KVM_HOST_SDR1, offsetof(struct kvm, arch.host_sdr1));
|
|
DEFINE(KVM_TLBIE_LOCK, offsetof(struct kvm, arch.tlbie_lock));
|
|
DEFINE(KVM_NEED_FLUSH, offsetof(struct kvm, arch.need_tlb_flush.bits));
|
|
DEFINE(KVM_LPCR, offsetof(struct kvm, arch.lpcr));
|
|
DEFINE(KVM_RMOR, offsetof(struct kvm, arch.rmor));
|
|
DEFINE(KVM_VRMA_SLB_V, offsetof(struct kvm, arch.vrma_slb_v));
|
|
DEFINE(VCPU_DSISR, offsetof(struct kvm_vcpu, arch.shregs.dsisr));
|
|
DEFINE(VCPU_DAR, offsetof(struct kvm_vcpu, arch.shregs.dar));
|
|
DEFINE(VCPU_VPA, offsetof(struct kvm_vcpu, arch.vpa.pinned_addr));
|
|
DEFINE(VCPU_VPA_DIRTY, offsetof(struct kvm_vcpu, arch.vpa.dirty));
|
|
#endif
|
|
#ifdef CONFIG_PPC_BOOK3S
|
|
DEFINE(VCPU_VCPUID, offsetof(struct kvm_vcpu, vcpu_id));
|
|
DEFINE(VCPU_PURR, offsetof(struct kvm_vcpu, arch.purr));
|
|
DEFINE(VCPU_SPURR, offsetof(struct kvm_vcpu, arch.spurr));
|
|
DEFINE(VCPU_DSCR, offsetof(struct kvm_vcpu, arch.dscr));
|
|
DEFINE(VCPU_AMR, offsetof(struct kvm_vcpu, arch.amr));
|
|
DEFINE(VCPU_UAMOR, offsetof(struct kvm_vcpu, arch.uamor));
|
|
DEFINE(VCPU_CTRL, offsetof(struct kvm_vcpu, arch.ctrl));
|
|
DEFINE(VCPU_DABR, offsetof(struct kvm_vcpu, arch.dabr));
|
|
DEFINE(VCPU_HFLAGS, offsetof(struct kvm_vcpu, arch.hflags));
|
|
DEFINE(VCPU_DEC, offsetof(struct kvm_vcpu, arch.dec));
|
|
DEFINE(VCPU_DEC_EXPIRES, offsetof(struct kvm_vcpu, arch.dec_expires));
|
|
DEFINE(VCPU_PENDING_EXC, offsetof(struct kvm_vcpu, arch.pending_exceptions));
|
|
DEFINE(VCPU_CEDED, offsetof(struct kvm_vcpu, arch.ceded));
|
|
DEFINE(VCPU_PRODDED, offsetof(struct kvm_vcpu, arch.prodded));
|
|
DEFINE(VCPU_MMCR, offsetof(struct kvm_vcpu, arch.mmcr));
|
|
DEFINE(VCPU_PMC, offsetof(struct kvm_vcpu, arch.pmc));
|
|
DEFINE(VCPU_SIAR, offsetof(struct kvm_vcpu, arch.siar));
|
|
DEFINE(VCPU_SDAR, offsetof(struct kvm_vcpu, arch.sdar));
|
|
DEFINE(VCPU_SLB, offsetof(struct kvm_vcpu, arch.slb));
|
|
DEFINE(VCPU_SLB_MAX, offsetof(struct kvm_vcpu, arch.slb_max));
|
|
DEFINE(VCPU_SLB_NR, offsetof(struct kvm_vcpu, arch.slb_nr));
|
|
DEFINE(VCPU_FAULT_DSISR, offsetof(struct kvm_vcpu, arch.fault_dsisr));
|
|
DEFINE(VCPU_FAULT_DAR, offsetof(struct kvm_vcpu, arch.fault_dar));
|
|
DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
|
|
DEFINE(VCPU_TRAP, offsetof(struct kvm_vcpu, arch.trap));
|
|
DEFINE(VCPU_PTID, offsetof(struct kvm_vcpu, arch.ptid));
|
|
DEFINE(VCPU_CFAR, offsetof(struct kvm_vcpu, arch.cfar));
|
|
DEFINE(VCPU_PPR, offsetof(struct kvm_vcpu, arch.ppr));
|
|
DEFINE(VCPU_SHADOW_SRR1, offsetof(struct kvm_vcpu, arch.shadow_srr1));
|
|
DEFINE(VCORE_ENTRY_EXIT, offsetof(struct kvmppc_vcore, entry_exit_count));
|
|
DEFINE(VCORE_NAP_COUNT, offsetof(struct kvmppc_vcore, nap_count));
|
|
DEFINE(VCORE_IN_GUEST, offsetof(struct kvmppc_vcore, in_guest));
|
|
DEFINE(VCORE_NAPPING_THREADS, offsetof(struct kvmppc_vcore, napping_threads));
|
|
DEFINE(VCORE_TB_OFFSET, offsetof(struct kvmppc_vcore, tb_offset));
|
|
DEFINE(VCORE_LPCR, offsetof(struct kvmppc_vcore, lpcr));
|
|
DEFINE(VCORE_PCR, offsetof(struct kvmppc_vcore, pcr));
|
|
DEFINE(VCPU_SLB_E, offsetof(struct kvmppc_slb, orige));
|
|
DEFINE(VCPU_SLB_V, offsetof(struct kvmppc_slb, origv));
|
|
DEFINE(VCPU_SLB_SIZE, sizeof(struct kvmppc_slb));
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
#ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
|
|
DEFINE(PACA_SVCPU, offsetof(struct paca_struct, shadow_vcpu));
|
|
# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, shadow_vcpu.f))
|
|
#else
|
|
# define SVCPU_FIELD(x, f)
|
|
#endif
|
|
# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct paca_struct, kvm_hstate.f))
|
|
#else /* 32-bit */
|
|
# define SVCPU_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, f))
|
|
# define HSTATE_FIELD(x, f) DEFINE(x, offsetof(struct kvmppc_book3s_shadow_vcpu, hstate.f))
|
|
#endif
|
|
|
|
SVCPU_FIELD(SVCPU_CR, cr);
|
|
SVCPU_FIELD(SVCPU_XER, xer);
|
|
SVCPU_FIELD(SVCPU_CTR, ctr);
|
|
SVCPU_FIELD(SVCPU_LR, lr);
|
|
SVCPU_FIELD(SVCPU_PC, pc);
|
|
SVCPU_FIELD(SVCPU_R0, gpr[0]);
|
|
SVCPU_FIELD(SVCPU_R1, gpr[1]);
|
|
SVCPU_FIELD(SVCPU_R2, gpr[2]);
|
|
SVCPU_FIELD(SVCPU_R3, gpr[3]);
|
|
SVCPU_FIELD(SVCPU_R4, gpr[4]);
|
|
SVCPU_FIELD(SVCPU_R5, gpr[5]);
|
|
SVCPU_FIELD(SVCPU_R6, gpr[6]);
|
|
SVCPU_FIELD(SVCPU_R7, gpr[7]);
|
|
SVCPU_FIELD(SVCPU_R8, gpr[8]);
|
|
SVCPU_FIELD(SVCPU_R9, gpr[9]);
|
|
SVCPU_FIELD(SVCPU_R10, gpr[10]);
|
|
SVCPU_FIELD(SVCPU_R11, gpr[11]);
|
|
SVCPU_FIELD(SVCPU_R12, gpr[12]);
|
|
SVCPU_FIELD(SVCPU_R13, gpr[13]);
|
|
SVCPU_FIELD(SVCPU_FAULT_DSISR, fault_dsisr);
|
|
SVCPU_FIELD(SVCPU_FAULT_DAR, fault_dar);
|
|
SVCPU_FIELD(SVCPU_LAST_INST, last_inst);
|
|
SVCPU_FIELD(SVCPU_SHADOW_SRR1, shadow_srr1);
|
|
#ifdef CONFIG_PPC_BOOK3S_32
|
|
SVCPU_FIELD(SVCPU_SR, sr);
|
|
#endif
|
|
#ifdef CONFIG_PPC64
|
|
SVCPU_FIELD(SVCPU_SLB, slb);
|
|
SVCPU_FIELD(SVCPU_SLB_MAX, slb_max);
|
|
#endif
|
|
|
|
HSTATE_FIELD(HSTATE_HOST_R1, host_r1);
|
|
HSTATE_FIELD(HSTATE_HOST_R2, host_r2);
|
|
HSTATE_FIELD(HSTATE_HOST_MSR, host_msr);
|
|
HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
|
|
HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
|
|
HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
|
|
HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
|
|
HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
|
|
HSTATE_FIELD(HSTATE_NAPPING, napping);
|
|
|
|
#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
|
|
HSTATE_FIELD(HSTATE_HWTHREAD_REQ, hwthread_req);
|
|
HSTATE_FIELD(HSTATE_HWTHREAD_STATE, hwthread_state);
|
|
HSTATE_FIELD(HSTATE_KVM_VCPU, kvm_vcpu);
|
|
HSTATE_FIELD(HSTATE_KVM_VCORE, kvm_vcore);
|
|
HSTATE_FIELD(HSTATE_XICS_PHYS, xics_phys);
|
|
HSTATE_FIELD(HSTATE_SAVED_XIRR, saved_xirr);
|
|
HSTATE_FIELD(HSTATE_HOST_IPI, host_ipi);
|
|
HSTATE_FIELD(HSTATE_MMCR, host_mmcr);
|
|
HSTATE_FIELD(HSTATE_PMC, host_pmc);
|
|
HSTATE_FIELD(HSTATE_PURR, host_purr);
|
|
HSTATE_FIELD(HSTATE_SPURR, host_spurr);
|
|
HSTATE_FIELD(HSTATE_DSCR, host_dscr);
|
|
HSTATE_FIELD(HSTATE_DABR, dabr);
|
|
HSTATE_FIELD(HSTATE_DECEXP, dec_expires);
|
|
DEFINE(IPI_PRIORITY, IPI_PRIORITY);
|
|
#endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
|
|
|
|
#ifdef CONFIG_PPC_BOOK3S_64
|
|
HSTATE_FIELD(HSTATE_CFAR, cfar);
|
|
HSTATE_FIELD(HSTATE_PPR, ppr);
|
|
#endif /* CONFIG_PPC_BOOK3S_64 */
|
|
|
|
#else /* CONFIG_PPC_BOOK3S */
|
|
DEFINE(VCPU_CR, offsetof(struct kvm_vcpu, arch.cr));
|
|
DEFINE(VCPU_XER, offsetof(struct kvm_vcpu, arch.xer));
|
|
DEFINE(VCPU_LR, offsetof(struct kvm_vcpu, arch.lr));
|
|
DEFINE(VCPU_CTR, offsetof(struct kvm_vcpu, arch.ctr));
|
|
DEFINE(VCPU_PC, offsetof(struct kvm_vcpu, arch.pc));
|
|
DEFINE(VCPU_LAST_INST, offsetof(struct kvm_vcpu, arch.last_inst));
|
|
DEFINE(VCPU_FAULT_DEAR, offsetof(struct kvm_vcpu, arch.fault_dear));
|
|
DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr));
|
|
DEFINE(VCPU_CRIT_SAVE, offsetof(struct kvm_vcpu, arch.crit_save));
|
|
#endif /* CONFIG_PPC_BOOK3S */
|
|
#endif /* CONFIG_KVM */
|
|
|
|
#ifdef CONFIG_KVM_GUEST
|
|
DEFINE(KVM_MAGIC_SCRATCH1, offsetof(struct kvm_vcpu_arch_shared,
|
|
scratch1));
|
|
DEFINE(KVM_MAGIC_SCRATCH2, offsetof(struct kvm_vcpu_arch_shared,
|
|
scratch2));
|
|
DEFINE(KVM_MAGIC_SCRATCH3, offsetof(struct kvm_vcpu_arch_shared,
|
|
scratch3));
|
|
DEFINE(KVM_MAGIC_INT, offsetof(struct kvm_vcpu_arch_shared,
|
|
int_pending));
|
|
DEFINE(KVM_MAGIC_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
|
|
DEFINE(KVM_MAGIC_CRITICAL, offsetof(struct kvm_vcpu_arch_shared,
|
|
critical));
|
|
DEFINE(KVM_MAGIC_SR, offsetof(struct kvm_vcpu_arch_shared, sr));
|
|
#endif
|
|
|
|
#ifdef CONFIG_44x
|
|
DEFINE(PGD_T_LOG2, PGD_T_LOG2);
|
|
DEFINE(PTE_T_LOG2, PTE_T_LOG2);
|
|
#endif
|
|
#ifdef CONFIG_PPC_FSL_BOOK3E
|
|
DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
|
|
DEFINE(TLBCAM_MAS0, offsetof(struct tlbcam, MAS0));
|
|
DEFINE(TLBCAM_MAS1, offsetof(struct tlbcam, MAS1));
|
|
DEFINE(TLBCAM_MAS2, offsetof(struct tlbcam, MAS2));
|
|
DEFINE(TLBCAM_MAS3, offsetof(struct tlbcam, MAS3));
|
|
DEFINE(TLBCAM_MAS7, offsetof(struct tlbcam, MAS7));
|
|
#endif
|
|
|
|
#if defined(CONFIG_KVM) && defined(CONFIG_SPE)
|
|
DEFINE(VCPU_EVR, offsetof(struct kvm_vcpu, arch.evr[0]));
|
|
DEFINE(VCPU_ACC, offsetof(struct kvm_vcpu, arch.acc));
|
|
DEFINE(VCPU_SPEFSCR, offsetof(struct kvm_vcpu, arch.spefscr));
|
|
DEFINE(VCPU_HOST_SPEFSCR, offsetof(struct kvm_vcpu, arch.host_spefscr));
|
|
#endif
|
|
|
|
#ifdef CONFIG_KVM_BOOKE_HV
|
|
DEFINE(VCPU_HOST_MAS4, offsetof(struct kvm_vcpu, arch.host_mas4));
|
|
DEFINE(VCPU_HOST_MAS6, offsetof(struct kvm_vcpu, arch.host_mas6));
|
|
DEFINE(VCPU_EPLC, offsetof(struct kvm_vcpu, arch.eplc));
|
|
#endif
|
|
|
|
#ifdef CONFIG_KVM_EXIT_TIMING
|
|
DEFINE(VCPU_TIMING_EXIT_TBU, offsetof(struct kvm_vcpu,
|
|
arch.timing_exit.tv32.tbu));
|
|
DEFINE(VCPU_TIMING_EXIT_TBL, offsetof(struct kvm_vcpu,
|
|
arch.timing_exit.tv32.tbl));
|
|
DEFINE(VCPU_TIMING_LAST_ENTER_TBU, offsetof(struct kvm_vcpu,
|
|
arch.timing_last_enter.tv32.tbu));
|
|
DEFINE(VCPU_TIMING_LAST_ENTER_TBL, offsetof(struct kvm_vcpu,
|
|
arch.timing_last_enter.tv32.tbl));
|
|
#endif
|
|
|
|
#ifdef CONFIG_PPC_POWERNV
|
|
DEFINE(OPAL_MC_GPR3, offsetof(struct opal_machine_check_event, gpr3));
|
|
DEFINE(OPAL_MC_SRR0, offsetof(struct opal_machine_check_event, srr0));
|
|
DEFINE(OPAL_MC_SRR1, offsetof(struct opal_machine_check_event, srr1));
|
|
DEFINE(PACA_OPAL_MC_EVT, offsetof(struct paca_struct, opal_mc_evt));
|
|
#endif
|
|
|
|
return 0;
|
|
}
|