Sonic Zhang bc6b92f8c3 Blackfin: don't attempt to flush on-chip L1 SRAM regions
Since the on-chip L1 regions are not cacheable, there is no point in
trying to flush/invalidate them.  Plus, older Blackfin parts like to
trigger an exception (like BF533-0.3).

Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
2011-05-25 08:13:41 -04:00
..
2011-03-31 11:26:23 -03:00
2011-03-31 11:26:23 -03:00
2011-03-29 14:47:59 +02:00