linux/drivers/crypto/nx
Haren Myneni 6333ed8f26 crypto: nx-842 - Mask XERS0 bit in return value
NX842 coprocessor sets 3rd bit in CR register with XER[S0] which is
nothing to do with NX request. Since this bit can be set with other
valuable return status, mast this bit.

One of other bits (INITIATED, BUSY or REJECTED) will be returned for
any given NX request.

Signed-off-by: Haren Myneni <haren@us.ibm.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
2015-12-17 16:42:12 +08:00
..
Kconfig
Makefile
nx-842-powernv.c crypto: nx-842 - Mask XERS0 bit in return value 2015-12-17 16:42:12 +08:00
nx-842-pseries.c crypto: 842 - Add CRC and validation support 2015-10-14 22:23:17 +08:00
nx-842.c
nx-842.h
nx-aes-cbc.c
nx-aes-ccm.c crypto: nx - Fix timing leak in GCM and CCM decryption 2015-11-16 21:39:23 +08:00
nx-aes-ctr.c
nx-aes-ecb.c
nx-aes-gcm.c crypto: nx - Fix timing leak in GCM and CCM decryption 2015-11-16 21:39:23 +08:00
nx-aes-xcbc.c
nx-sha256.c
nx-sha512.c
nx.c
nx.h
nx_csbcpb.h
nx_debugfs.c