499 lines
13 KiB
C
499 lines
13 KiB
C
/*
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* AD5686R, AD5685R, AD5684R Digital to analog converters driver
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*
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* Copyright 2011 Analog Devices Inc.
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*
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* Licensed under the GPL-2.
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*/
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#include <linux/interrupt.h>
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#include <linux/gpio.h>
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#include <linux/fs.h>
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#include <linux/device.h>
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#include <linux/module.h>
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#include <linux/kernel.h>
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#include <linux/spi/spi.h>
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#include <linux/slab.h>
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#include <linux/sysfs.h>
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#include <linux/regulator/consumer.h>
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#include "../iio.h"
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#include "../sysfs.h"
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#include "dac.h"
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#define AD5686_DAC_CHANNELS 4
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#define AD5686_ADDR(x) ((x) << 16)
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#define AD5686_CMD(x) ((x) << 20)
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#define AD5686_ADDR_DAC0 0x1
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#define AD5686_ADDR_DAC1 0x2
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#define AD5686_ADDR_DAC2 0x4
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#define AD5686_ADDR_DAC3 0x8
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#define AD5686_ADDR_ALL_DAC 0xF
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#define AD5686_CMD_NOOP 0x0
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#define AD5686_CMD_WRITE_INPUT_N 0x1
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#define AD5686_CMD_UPDATE_DAC_N 0x2
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#define AD5686_CMD_WRITE_INPUT_N_UPDATE_N 0x3
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#define AD5686_CMD_POWERDOWN_DAC 0x4
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#define AD5686_CMD_LDAC_MASK 0x5
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#define AD5686_CMD_RESET 0x6
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#define AD5686_CMD_INTERNAL_REFER_SETUP 0x7
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#define AD5686_CMD_DAISY_CHAIN_ENABLE 0x8
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#define AD5686_CMD_READBACK_ENABLE 0x9
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#define AD5686_LDAC_PWRDN_NONE 0x0
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#define AD5686_LDAC_PWRDN_1K 0x1
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#define AD5686_LDAC_PWRDN_100K 0x2
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#define AD5686_LDAC_PWRDN_3STATE 0x3
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/**
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* struct ad5686_chip_info - chip specific information
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* @int_vref_mv: AD5620/40/60: the internal reference voltage
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* @channel: channel specification
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*/
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struct ad5686_chip_info {
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u16 int_vref_mv;
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struct iio_chan_spec channel[AD5686_DAC_CHANNELS];
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};
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/**
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* struct ad5446_state - driver instance specific data
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* @spi: spi_device
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* @chip_info: chip model specific constants, available modes etc
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* @reg: supply regulator
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* @vref_mv: actual reference voltage used
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* @pwr_down_mask: power down mask
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* @pwr_down_mode: current power down mode
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* @data: spi transfer buffers
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*/
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struct ad5686_state {
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struct spi_device *spi;
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const struct ad5686_chip_info *chip_info;
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struct regulator *reg;
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unsigned short vref_mv;
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unsigned pwr_down_mask;
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unsigned pwr_down_mode;
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/*
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* DMA (thus cache coherency maintenance) requires the
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* transfer buffers to live in their own cache lines.
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*/
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union {
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u32 d32;
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u8 d8[4];
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} data[3] ____cacheline_aligned;
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};
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/**
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* ad5686_supported_device_ids:
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*/
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enum ad5686_supported_device_ids {
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ID_AD5684,
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ID_AD5685,
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ID_AD5686,
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};
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static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
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[ID_AD5684] = {
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.channel[0] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 0, 0,
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(1 << IIO_CHAN_INFO_SCALE_SHARED),
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AD5686_ADDR_DAC0,
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0, IIO_ST('u', 12, 16, 4), 0),
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.channel[1] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 1, 0,
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(1 << IIO_CHAN_INFO_SCALE_SHARED),
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AD5686_ADDR_DAC1,
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1, IIO_ST('u', 12, 16, 4), 0),
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.channel[2] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 2, 0,
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(1 << IIO_CHAN_INFO_SCALE_SHARED),
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AD5686_ADDR_DAC2,
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2, IIO_ST('u', 12, 16, 4), 0),
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.channel[3] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 3, 0,
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(1 << IIO_CHAN_INFO_SCALE_SHARED),
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AD5686_ADDR_DAC3,
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3, IIO_ST('u', 12, 16, 4), 0),
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.int_vref_mv = 2500,
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},
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[ID_AD5685] = {
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.channel[0] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 0, 0,
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(1 << IIO_CHAN_INFO_SCALE_SHARED),
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AD5686_ADDR_DAC0,
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0, IIO_ST('u', 14, 16, 2), 0),
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.channel[1] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 1, 0,
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(1 << IIO_CHAN_INFO_SCALE_SHARED),
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AD5686_ADDR_DAC1,
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1, IIO_ST('u', 14, 16, 2), 0),
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.channel[2] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 2, 0,
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(1 << IIO_CHAN_INFO_SCALE_SHARED),
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AD5686_ADDR_DAC2,
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2, IIO_ST('u', 14, 16, 2), 0),
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.channel[3] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 3, 0,
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(1 << IIO_CHAN_INFO_SCALE_SHARED),
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AD5686_ADDR_DAC3,
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3, IIO_ST('u', 14, 16, 2), 0),
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.int_vref_mv = 2500,
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},
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[ID_AD5686] = {
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.channel[0] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 0, 0,
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(1 << IIO_CHAN_INFO_SCALE_SHARED),
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AD5686_ADDR_DAC0,
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0, IIO_ST('u', 16, 16, 0), 0),
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.channel[1] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 1, 0,
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(1 << IIO_CHAN_INFO_SCALE_SHARED),
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AD5686_ADDR_DAC1,
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1, IIO_ST('u', 16, 16, 0), 0),
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.channel[2] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 2, 0,
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(1 << IIO_CHAN_INFO_SCALE_SHARED),
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AD5686_ADDR_DAC2,
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2, IIO_ST('u', 16, 16, 0), 0),
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.channel[3] = IIO_CHAN(IIO_OUT, 0, 1, 0, NULL, 3, 0,
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(1 << IIO_CHAN_INFO_SCALE_SHARED),
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AD5686_ADDR_DAC3,
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3, IIO_ST('u', 16, 16, 0), 0),
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.int_vref_mv = 2500,
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},
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};
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static int ad5686_spi_write(struct ad5686_state *st,
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u8 cmd, u8 addr, u16 val, u8 shift)
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{
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val <<= shift;
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st->data[0].d32 = cpu_to_be32(AD5686_CMD(cmd) |
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AD5686_ADDR(addr) |
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val);
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return spi_write(st->spi, &st->data[0].d8[1], 3);
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}
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static int ad5686_spi_read(struct ad5686_state *st, u8 addr)
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{
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struct spi_transfer t[] = {
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{
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.tx_buf = &st->data[0].d8[1],
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.len = 3,
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.cs_change = 1,
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}, {
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.tx_buf = &st->data[1].d8[1],
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.rx_buf = &st->data[2].d8[1],
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.len = 3,
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},
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};
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struct spi_message m;
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int ret;
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spi_message_init(&m);
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spi_message_add_tail(&t[0], &m);
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spi_message_add_tail(&t[1], &m);
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st->data[0].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_READBACK_ENABLE) |
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AD5686_ADDR(addr));
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st->data[1].d32 = cpu_to_be32(AD5686_CMD(AD5686_CMD_NOOP));
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ret = spi_sync(st->spi, &m);
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if (ret < 0)
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return ret;
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return be32_to_cpu(st->data[2].d32);
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}
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static ssize_t ad5686_read_powerdown_mode(struct device *dev,
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struct device_attribute *attr, char *buf)
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{
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct ad5686_state *st = iio_priv(indio_dev);
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struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
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char mode[][15] = {"", "1kohm_to_gnd", "100kohm_to_gnd", "three_state"};
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return sprintf(buf, "%s\n", mode[(st->pwr_down_mode >>
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(this_attr->address * 2)) & 0x3]);
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}
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static ssize_t ad5686_write_powerdown_mode(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t len)
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{
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct ad5686_state *st = iio_priv(indio_dev);
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struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
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unsigned mode;
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if (sysfs_streq(buf, "1kohm_to_gnd"))
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mode = AD5686_LDAC_PWRDN_1K;
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else if (sysfs_streq(buf, "100kohm_to_gnd"))
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mode = AD5686_LDAC_PWRDN_100K;
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else if (sysfs_streq(buf, "three_state"))
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mode = AD5686_LDAC_PWRDN_3STATE;
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else
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return -EINVAL;
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st->pwr_down_mode &= ~(0x3 << (this_attr->address * 2));
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st->pwr_down_mode |= (mode << (this_attr->address * 2));
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return len;
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}
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static ssize_t ad5686_read_dac_powerdown(struct device *dev,
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struct device_attribute *attr,
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char *buf)
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{
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct ad5686_state *st = iio_priv(indio_dev);
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struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
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return sprintf(buf, "%d\n", !!(st->pwr_down_mask &
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(0x3 << (this_attr->address * 2))));
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}
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static ssize_t ad5686_write_dac_powerdown(struct device *dev,
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struct device_attribute *attr,
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const char *buf, size_t len)
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{
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bool readin;
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int ret;
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struct iio_dev *indio_dev = dev_get_drvdata(dev);
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struct ad5686_state *st = iio_priv(indio_dev);
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struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
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ret = strtobool(buf, &readin);
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if (ret)
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return ret;
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if (readin == true)
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st->pwr_down_mask |= (0x3 << (this_attr->address * 2));
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else
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st->pwr_down_mask &= ~(0x3 << (this_attr->address * 2));
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ret = ad5686_spi_write(st, AD5686_CMD_POWERDOWN_DAC, 0,
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st->pwr_down_mask & st->pwr_down_mode, 0);
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return ret ? ret : len;
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}
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static IIO_CONST_ATTR(out_powerdown_mode_available,
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"1kohm_to_gnd 100kohm_to_gnd three_state");
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#define IIO_DEV_ATTR_DAC_POWERDOWN_MODE(_num) \
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IIO_DEVICE_ATTR(out##_num##_powerdown_mode, S_IRUGO | S_IWUSR, \
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ad5686_read_powerdown_mode, \
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ad5686_write_powerdown_mode, _num)
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static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(0);
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static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(1);
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static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(2);
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static IIO_DEV_ATTR_DAC_POWERDOWN_MODE(3);
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#define IIO_DEV_ATTR_DAC_POWERDOWN(_num) \
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IIO_DEVICE_ATTR(out##_num##_powerdown, S_IRUGO | S_IWUSR, \
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ad5686_read_dac_powerdown, \
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ad5686_write_dac_powerdown, _num)
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static IIO_DEV_ATTR_DAC_POWERDOWN(0);
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static IIO_DEV_ATTR_DAC_POWERDOWN(1);
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static IIO_DEV_ATTR_DAC_POWERDOWN(2);
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static IIO_DEV_ATTR_DAC_POWERDOWN(3);
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static struct attribute *ad5686_attributes[] = {
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&iio_dev_attr_out0_powerdown.dev_attr.attr,
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&iio_dev_attr_out1_powerdown.dev_attr.attr,
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&iio_dev_attr_out2_powerdown.dev_attr.attr,
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&iio_dev_attr_out3_powerdown.dev_attr.attr,
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&iio_dev_attr_out0_powerdown_mode.dev_attr.attr,
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&iio_dev_attr_out1_powerdown_mode.dev_attr.attr,
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&iio_dev_attr_out2_powerdown_mode.dev_attr.attr,
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&iio_dev_attr_out3_powerdown_mode.dev_attr.attr,
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&iio_const_attr_out_powerdown_mode_available.dev_attr.attr,
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NULL,
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};
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static const struct attribute_group ad5686_attribute_group = {
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.attrs = ad5686_attributes,
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};
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static int ad5686_read_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int *val,
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int *val2,
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long m)
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{
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struct ad5686_state *st = iio_priv(indio_dev);
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unsigned long scale_uv;
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int ret;
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switch (m) {
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case 0:
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mutex_lock(&indio_dev->mlock);
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ret = ad5686_spi_read(st, chan->address);
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mutex_unlock(&indio_dev->mlock);
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if (ret < 0)
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return ret;
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*val = ret;
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return IIO_VAL_INT;
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break;
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case (1 << IIO_CHAN_INFO_SCALE_SHARED):
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scale_uv = (st->vref_mv * 100000)
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>> (chan->scan_type.realbits);
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*val = scale_uv / 100000;
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*val2 = (scale_uv % 100000) * 10;
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return IIO_VAL_INT_PLUS_MICRO;
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}
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return -EINVAL;
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}
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static int ad5686_write_raw(struct iio_dev *indio_dev,
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struct iio_chan_spec const *chan,
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int val,
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int val2,
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long mask)
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{
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struct ad5686_state *st = iio_priv(indio_dev);
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int ret;
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switch (mask) {
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case 0:
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if (val > (1 << chan->scan_type.realbits))
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return -EINVAL;
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mutex_lock(&indio_dev->mlock);
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ret = ad5686_spi_write(st,
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AD5686_CMD_WRITE_INPUT_N_UPDATE_N,
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chan->address,
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val,
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chan->scan_type.shift);
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mutex_unlock(&indio_dev->mlock);
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break;
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default:
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ret = -EINVAL;
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}
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return ret;
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}
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static const struct iio_info ad5686_info = {
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.read_raw = ad5686_read_raw,
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.write_raw = ad5686_write_raw,
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.attrs = &ad5686_attribute_group,
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.driver_module = THIS_MODULE,
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};
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static int __devinit ad5686_probe(struct spi_device *spi)
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{
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struct ad5686_state *st;
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struct iio_dev *indio_dev;
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int ret, regdone = 0, voltage_uv = 0;
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indio_dev = iio_allocate_device(sizeof(*st));
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if (indio_dev == NULL)
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return -ENOMEM;
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st = iio_priv(indio_dev);
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spi_set_drvdata(spi, indio_dev);
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st->reg = regulator_get(&spi->dev, "vcc");
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if (!IS_ERR(st->reg)) {
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ret = regulator_enable(st->reg);
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if (ret)
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goto error_put_reg;
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voltage_uv = regulator_get_voltage(st->reg);
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}
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st->chip_info =
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&ad5686_chip_info_tbl[spi_get_device_id(spi)->driver_data];
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if (voltage_uv)
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st->vref_mv = voltage_uv / 1000;
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else
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st->vref_mv = st->chip_info->int_vref_mv;
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st->spi = spi;
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indio_dev->dev.parent = &spi->dev;
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indio_dev->name = spi_get_device_id(spi)->name;
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indio_dev->info = &ad5686_info;
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indio_dev->modes = INDIO_DIRECT_MODE;
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indio_dev->channels = st->chip_info->channel;
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indio_dev->num_channels = AD5686_DAC_CHANNELS;
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ret = iio_device_register(indio_dev);
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if (ret)
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goto error_disable_reg;
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regdone = 1;
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ret = ad5686_spi_write(st, AD5686_CMD_INTERNAL_REFER_SETUP, 0,
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!!voltage_uv, 0);
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if (ret)
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goto error_disable_reg;
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return 0;
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error_disable_reg:
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if (!IS_ERR(st->reg))
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regulator_disable(st->reg);
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error_put_reg:
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if (!IS_ERR(st->reg))
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regulator_put(st->reg);
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if (regdone)
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iio_device_unregister(indio_dev);
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else
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iio_free_device(indio_dev);
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return ret;
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}
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static int __devexit ad5686_remove(struct spi_device *spi)
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{
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struct iio_dev *indio_dev = spi_get_drvdata(spi);
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struct ad5686_state *st = iio_priv(indio_dev);
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struct regulator *reg = st->reg;
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if (!IS_ERR(reg)) {
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regulator_disable(reg);
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regulator_put(reg);
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}
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iio_device_unregister(indio_dev);
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return 0;
|
|
}
|
|
|
|
static const struct spi_device_id ad5686_id[] = {
|
|
{"ad5684", ID_AD5684},
|
|
{"ad5685", ID_AD5685},
|
|
{"ad5686", ID_AD5686},
|
|
{}
|
|
};
|
|
|
|
static struct spi_driver ad5686_driver = {
|
|
.driver = {
|
|
.name = "ad5686",
|
|
.owner = THIS_MODULE,
|
|
},
|
|
.probe = ad5686_probe,
|
|
.remove = __devexit_p(ad5686_remove),
|
|
.id_table = ad5686_id,
|
|
};
|
|
|
|
static __init int ad5686_spi_init(void)
|
|
{
|
|
return spi_register_driver(&ad5686_driver);
|
|
}
|
|
module_init(ad5686_spi_init);
|
|
|
|
static __exit void ad5686_spi_exit(void)
|
|
{
|
|
spi_unregister_driver(&ad5686_driver);
|
|
}
|
|
module_exit(ad5686_spi_exit);
|
|
|
|
MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
|
|
MODULE_DESCRIPTION("Analog Devices AD5686/85/84 DAC");
|
|
MODULE_LICENSE("GPL v2");
|