c3ae6175dd
This patch adds the internal data structures required to perform SCIF RMAs. The data structures required to maintain per SCIF endpoint, RMA information are contained in scif_endpt_rma_info. scif_pinned_pages describes a set of SCIF pinned pages maintained locally. The scif_window is a data structure which contains all the fields required to describe a SCIF registered window on self and remote nodes. It contains an offset which is used as a key to perform SCIF DMAs and CPU copies between self and remote registered windows. Reviewed-by: Nikhil Rao <nikhil.rao@intel.com> Reviewed-by: Ashutosh Dixit <ashutosh.dixit@intel.com> Signed-off-by: Sudeep Dutt <sudeep.dutt@intel.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
465 lines
16 KiB
C
465 lines
16 KiB
C
/*
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* Intel MIC Platform Software Stack (MPSS)
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*
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* This file is provided under a dual BSD/GPLv2 license. When using or
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* redistributing this file, you may do so under either license.
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*
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* GPL LICENSE SUMMARY
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*
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* Copyright(c) 2015 Intel Corporation.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* BSD LICENSE
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*
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* Copyright(c) 2015 Intel Corporation.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* * Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* * Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in
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* the documentation and/or other materials provided with the
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* distribution.
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* * Neither the name of Intel Corporation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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* "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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* LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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* A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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* OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* Intel SCIF driver.
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*
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*/
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#ifndef SCIF_RMA_H
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#define SCIF_RMA_H
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#include <linux/dma_remapping.h>
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#include <linux/mmu_notifier.h>
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#include "../bus/scif_bus.h"
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/* If this bit is set then the mark is a remote fence mark */
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#define SCIF_REMOTE_FENCE_BIT 31
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/* Magic value used to indicate a remote fence request */
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#define SCIF_REMOTE_FENCE BIT_ULL(SCIF_REMOTE_FENCE_BIT)
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#define SCIF_MAX_UNALIGNED_BUF_SIZE (1024 * 1024ULL)
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#define SCIF_KMEM_UNALIGNED_BUF_SIZE (SCIF_MAX_UNALIGNED_BUF_SIZE + \
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(L1_CACHE_BYTES << 1))
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#define SCIF_IOVA_START_PFN (1)
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#define SCIF_IOVA_PFN(addr) ((addr) >> PAGE_SHIFT)
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#define SCIF_DMA_64BIT_PFN SCIF_IOVA_PFN(DMA_BIT_MASK(64))
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#define SCIF_DMA_63BIT_PFN SCIF_IOVA_PFN(DMA_BIT_MASK(63))
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/*
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* struct scif_endpt_rma_info - Per Endpoint Remote Memory Access Information
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*
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* @reg_list: List of registration windows for self
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* @remote_reg_list: List of registration windows for peer
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* @iovad: Offset generator
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* @rma_lock: Synchronizes access to self/remote list and also protects the
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* window from being destroyed while RMAs are in progress.
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* @tc_lock: Synchronizes access to temporary cached windows list
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* for SCIF Registration Caching.
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* @mmn_lock: Synchronizes access to the list of MMU notifiers registered
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* @tw_refcount: Keeps track of number of outstanding temporary registered
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* windows created by scif_vreadfrom/scif_vwriteto which have
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* not been destroyed.
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* @tcw_refcount: Same as tw_refcount but for temporary cached windows
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* @tcw_total_pages: Same as tcw_refcount but in terms of pages pinned
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* @mmn_list: MMU notifier so that we can destroy the windows when required
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* @fence_refcount: Keeps track of number of outstanding remote fence
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* requests which have been received by the peer.
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* @dma_chan: DMA channel used for all DMA transfers for this endpoint.
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* @async_list_del: Detect asynchronous list entry deletion
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* @vma_list: List of vmas with remote memory mappings
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* @markwq: Wait queue used for scif_fence_mark/scif_fence_wait
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*/
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struct scif_endpt_rma_info {
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struct list_head reg_list;
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struct list_head remote_reg_list;
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struct iova_domain iovad;
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struct mutex rma_lock;
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spinlock_t tc_lock;
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struct mutex mmn_lock;
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atomic_t tw_refcount;
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atomic_t tcw_refcount;
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atomic_t tcw_total_pages;
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struct list_head mmn_list;
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atomic_t fence_refcount;
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struct dma_chan *dma_chan;
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int async_list_del;
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struct list_head vma_list;
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wait_queue_head_t markwq;
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};
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/*
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* struct scif_fence_info - used for tracking fence requests
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*
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* @state: State of this transfer
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* @wq: Fences wait on this queue
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* @dma_mark: Used for storing the DMA mark
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*/
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struct scif_fence_info {
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enum scif_msg_state state;
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struct completion comp;
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int dma_mark;
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};
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/*
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* struct scif_remote_fence_info - used for tracking remote fence requests
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*
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* @msg: List of SCIF node QP fence messages
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* @list: Link to list of remote fence requests
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*/
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struct scif_remote_fence_info {
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struct scifmsg msg;
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struct list_head list;
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};
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/*
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* Specifies whether an RMA operation can span across partial windows, a single
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* window or multiple contiguous windows. Mmaps can span across partial windows.
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* Unregistration can span across complete windows. scif_get_pages() can span a
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* single window. A window can also be of type self or peer.
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*/
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enum scif_window_type {
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SCIF_WINDOW_PARTIAL,
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SCIF_WINDOW_SINGLE,
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SCIF_WINDOW_FULL,
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SCIF_WINDOW_SELF,
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SCIF_WINDOW_PEER
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};
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/* The number of physical addresses that can be stored in a PAGE. */
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#define SCIF_NR_ADDR_IN_PAGE (0x1000 >> 3)
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/*
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* struct scif_rma_lookup - RMA lookup data structure for page list transfers
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*
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* Store an array of lookup offsets. Each offset in this array maps
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* one 4K page containing 512 physical addresses i.e. 2MB. 512 such
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* offsets in a 4K page will correspond to 1GB of registered address space.
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* @lookup: Array of offsets
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* @offset: DMA offset of lookup array
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*/
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struct scif_rma_lookup {
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dma_addr_t *lookup;
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dma_addr_t offset;
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};
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/*
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* struct scif_pinned_pages - A set of pinned pages obtained with
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* scif_pin_pages() which could be part of multiple registered
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* windows across different end points.
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*
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* @nr_pages: Number of pages which is defined as a s64 instead of an int
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* to avoid sign extension with buffers >= 2GB
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* @prot: read/write protections
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* @map_flags: Flags specified during the pin operation
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* @ref_count: Reference count bumped in terms of number of pages
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* @magic: A magic value
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* @pages: Array of pointers to struct pages populated with get_user_pages(..)
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*/
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struct scif_pinned_pages {
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s64 nr_pages;
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int prot;
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int map_flags;
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atomic_t ref_count;
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u64 magic;
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struct page **pages;
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};
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/*
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* struct scif_status - Stores DMA status update information
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*
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* @src_dma_addr: Source buffer DMA address
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* @val: src location for value to be written to the destination
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* @ep: SCIF endpoint
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*/
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struct scif_status {
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dma_addr_t src_dma_addr;
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u64 val;
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struct scif_endpt *ep;
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};
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/*
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* struct scif_window - Registration Window for Self and Remote
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*
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* @nr_pages: Number of pages which is defined as a s64 instead of an int
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* to avoid sign extension with buffers >= 2GB
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* @nr_contig_chunks: Number of contiguous physical chunks
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* @prot: read/write protections
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* @ref_count: reference count in terms of number of pages
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* @magic: Cookie to detect corruption
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* @offset: registered offset
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* @va_for_temp: va address that this window represents
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* @dma_mark: Used to determine if all DMAs against the window are done
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* @ep: Pointer to EP. Useful for passing EP around with messages to
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avoid expensive list traversals.
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* @list: link to list of windows for the endpoint
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* @type: self or peer window
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* @peer_window: Pointer to peer window. Useful for sending messages to peer
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* without requiring an extra list traversal
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* @unreg_state: unregistration state
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* @offset_freed: True if the offset has been freed
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* @temp: True for temporary windows created via scif_vreadfrom/scif_vwriteto
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* @mm: memory descriptor for the task_struct which initiated the RMA
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* @st: scatter gather table for DMA mappings with IOMMU enabled
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* @pinned_pages: The set of pinned_pages backing this window
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* @alloc_handle: Handle for sending ALLOC_REQ
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* @regwq: Wait Queue for an registration (N)ACK
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* @reg_state: Registration state
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* @unregwq: Wait Queue for an unregistration (N)ACK
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* @dma_addr_lookup: Lookup for physical addresses used for DMA
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* @nr_lookup: Number of entries in lookup
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* @mapped_offset: Offset used to map the window by the peer
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* @dma_addr: Array of physical addresses used for Mgmt node & MIC initiated DMA
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* @num_pages: Array specifying number of pages for each physical address
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*/
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struct scif_window {
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s64 nr_pages;
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int nr_contig_chunks;
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int prot;
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int ref_count;
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u64 magic;
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s64 offset;
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unsigned long va_for_temp;
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int dma_mark;
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u64 ep;
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struct list_head list;
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enum scif_window_type type;
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u64 peer_window;
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enum scif_msg_state unreg_state;
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bool offset_freed;
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bool temp;
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struct mm_struct *mm;
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struct sg_table *st;
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union {
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struct {
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struct scif_pinned_pages *pinned_pages;
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struct scif_allocmsg alloc_handle;
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wait_queue_head_t regwq;
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enum scif_msg_state reg_state;
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wait_queue_head_t unregwq;
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};
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struct {
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struct scif_rma_lookup dma_addr_lookup;
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struct scif_rma_lookup num_pages_lookup;
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int nr_lookup;
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dma_addr_t mapped_offset;
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};
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};
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dma_addr_t *dma_addr;
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u64 *num_pages;
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} __packed;
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/*
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* scif_mmu_notif - SCIF mmu notifier information
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*
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* @mmu_notifier ep_mmu_notifier: MMU notifier operations
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* @tc_reg_list: List of temp registration windows for self
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* @mm: memory descriptor for the task_struct which initiated the RMA
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* @ep: SCIF endpoint
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* @list: link to list of MMU notifier information
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*/
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struct scif_mmu_notif {
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#ifdef CONFIG_MMU_NOTIFIER
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struct mmu_notifier ep_mmu_notifier;
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#endif
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struct list_head tc_reg_list;
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struct mm_struct *mm;
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struct scif_endpt *ep;
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struct list_head list;
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};
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enum scif_rma_dir {
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SCIF_LOCAL_TO_REMOTE,
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SCIF_REMOTE_TO_LOCAL
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};
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extern struct kmem_cache *unaligned_cache;
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/* Initialize RMA for this EP */
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void scif_rma_ep_init(struct scif_endpt *ep);
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/* Check if epd can be uninitialized */
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int scif_rma_ep_can_uninit(struct scif_endpt *ep);
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/* Obtain a new offset. Callee must grab RMA lock */
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int scif_get_window_offset(struct scif_endpt *ep, int flags,
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s64 offset, int nr_pages, s64 *out_offset);
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/* Free offset. Callee must grab RMA lock */
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void scif_free_window_offset(struct scif_endpt *ep,
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struct scif_window *window, s64 offset);
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/* Create self registration window */
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struct scif_window *scif_create_window(struct scif_endpt *ep, int nr_pages,
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s64 offset, bool temp);
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/* Destroy self registration window.*/
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int scif_destroy_window(struct scif_endpt *ep, struct scif_window *window);
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void scif_unmap_window(struct scif_dev *remote_dev, struct scif_window *window);
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/* Map pages of self window to Aperture/PCI */
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int scif_map_window(struct scif_dev *remote_dev,
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struct scif_window *window);
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/* Unregister a self window */
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int scif_unregister_window(struct scif_window *window);
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/* Destroy remote registration window */
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void
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scif_destroy_remote_window(struct scif_window *window);
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/* remove valid remote memory mappings from process address space */
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void scif_zap_mmaps(int node);
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/* Query if any applications have remote memory mappings */
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bool scif_rma_do_apps_have_mmaps(int node);
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/* Cleanup remote registration lists for zombie endpoints */
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void scif_cleanup_rma_for_zombies(int node);
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/* Reserve a DMA channel for a particular endpoint */
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int scif_reserve_dma_chan(struct scif_endpt *ep);
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/* Setup a DMA mark for an endpoint */
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int _scif_fence_mark(scif_epd_t epd, int *mark);
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int scif_prog_signal(scif_epd_t epd, off_t offset, u64 val,
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enum scif_window_type type);
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void scif_alloc_req(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_alloc_gnt_rej(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_free_virt(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_recv_reg(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_recv_unreg(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_recv_reg_ack(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_recv_reg_nack(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_recv_unreg_ack(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_recv_unreg_nack(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_recv_munmap(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_recv_mark(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_recv_mark_resp(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_recv_wait(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_recv_wait_resp(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_recv_sig_local(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_recv_sig_remote(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_recv_sig_resp(struct scif_dev *scifdev, struct scifmsg *msg);
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void scif_mmu_notif_handler(struct work_struct *work);
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void scif_rma_handle_remote_fences(void);
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void scif_rma_destroy_windows(void);
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void scif_rma_destroy_tcw_invalid(void);
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int scif_drain_dma_intr(struct scif_hw_dev *sdev, struct dma_chan *chan);
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struct scif_window_iter {
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s64 offset;
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int index;
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};
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static inline void
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scif_init_window_iter(struct scif_window *window, struct scif_window_iter *iter)
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{
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iter->offset = window->offset;
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iter->index = 0;
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}
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dma_addr_t scif_off_to_dma_addr(struct scif_window *window, s64 off,
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size_t *nr_bytes,
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struct scif_window_iter *iter);
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static inline
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dma_addr_t __scif_off_to_dma_addr(struct scif_window *window, s64 off)
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{
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return scif_off_to_dma_addr(window, off, NULL, NULL);
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}
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static inline bool scif_unaligned(off_t src_offset, off_t dst_offset)
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{
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src_offset = src_offset & (L1_CACHE_BYTES - 1);
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dst_offset = dst_offset & (L1_CACHE_BYTES - 1);
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return !(src_offset == dst_offset);
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}
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/*
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* scif_zalloc:
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* @size: Size of the allocation request.
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*
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* Helper API which attempts to allocate zeroed pages via
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* __get_free_pages(..) first and then falls back on
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* vzalloc(..) if that fails.
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*/
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static inline void *scif_zalloc(size_t size)
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{
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void *ret = NULL;
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size_t align = ALIGN(size, PAGE_SIZE);
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if (align && get_order(align) < MAX_ORDER)
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ret = (void *)__get_free_pages(GFP_KERNEL | __GFP_ZERO,
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get_order(align));
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return ret ? ret : vzalloc(align);
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}
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/*
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* scif_free:
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* @addr: Address to be freed.
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* @size: Size of the allocation.
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* Helper API which frees memory allocated via scif_zalloc().
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*/
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static inline void scif_free(void *addr, size_t size)
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{
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size_t align = ALIGN(size, PAGE_SIZE);
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if (is_vmalloc_addr(addr))
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vfree(addr);
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else
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free_pages((unsigned long)addr, get_order(align));
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}
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static inline void scif_get_window(struct scif_window *window, int nr_pages)
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{
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window->ref_count += nr_pages;
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}
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static inline void scif_put_window(struct scif_window *window, int nr_pages)
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{
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window->ref_count -= nr_pages;
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}
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static inline void scif_set_window_ref(struct scif_window *window, int nr_pages)
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{
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window->ref_count = nr_pages;
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}
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static inline void
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scif_queue_for_cleanup(struct scif_window *window, struct list_head *list)
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{
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spin_lock(&scif_info.rmalock);
|
|
list_add_tail(&window->list, list);
|
|
spin_unlock(&scif_info.rmalock);
|
|
schedule_work(&scif_info.misc_work);
|
|
}
|
|
|
|
static inline void __scif_rma_destroy_tcw_helper(struct scif_window *window)
|
|
{
|
|
list_del_init(&window->list);
|
|
scif_queue_for_cleanup(window, &scif_info.rma_tc);
|
|
}
|
|
|
|
static inline bool scif_is_iommu_enabled(void)
|
|
{
|
|
#ifdef CONFIG_INTEL_IOMMU
|
|
return intel_iommu_enabled;
|
|
#else
|
|
return false;
|
|
#endif
|
|
}
|
|
#endif /* SCIF_RMA_H */
|