127 lines
2.5 KiB
C
127 lines
2.5 KiB
C
/* This is the single file included by all MPC8xx build options.
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* Since there are many different boards and no standard configuration,
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* we have a unique include file for each. Rather than change every
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* file that has to include MPC8xx configuration, they all include
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* this one and the configuration switching is done here.
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*/
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#ifdef __KERNEL__
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#ifndef __CONFIG_8xx_DEFS
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#define __CONFIG_8xx_DEFS
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#ifdef CONFIG_8xx
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#ifdef CONFIG_MBX
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#include <platforms/mbx.h>
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#endif
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#ifdef CONFIG_FADS
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#include <platforms/fads.h>
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#endif
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#ifdef CONFIG_RPXLITE
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#include <platforms/rpxlite.h>
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#endif
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#ifdef CONFIG_BSEIP
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#include <platforms/bseip.h>
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#endif
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#ifdef CONFIG_RPXCLASSIC
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#include <platforms/rpxclassic.h>
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#endif
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#if defined(CONFIG_TQM8xxL)
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#include <platforms/tqm8xx.h>
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#endif
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#if defined(CONFIG_IVMS8) || defined(CONFIG_IVML24)
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#include <platforms/ivms8.h>
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#endif
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#if defined(CONFIG_HERMES_PRO)
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#include <platforms/hermes.h>
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#endif
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#if defined(CONFIG_IP860)
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#include <platforms/ip860.h>
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#endif
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#if defined(CONFIG_LWMON)
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#include <platforms/lwmon.h>
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#endif
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#if defined(CONFIG_PCU_E)
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#include <platforms/pcu_e.h>
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#endif
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#if defined(CONFIG_CCM)
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#include <platforms/ccm.h>
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#endif
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#if defined(CONFIG_LANTEC)
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#include <platforms/lantec.h>
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#endif
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#if defined(CONFIG_MPC885ADS)
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#include <platforms/mpc885ads.h>
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#endif
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/* Currently, all 8xx boards that support a processor to PCI/ISA bridge
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* use the same memory map.
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*/
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#if 0
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#if defined(CONFIG_PCI) && defined(PCI_ISA_IO_ADDR)
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#define _IO_BASE PCI_ISA_IO_ADDR
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#define _ISA_MEM_BASE PCI_ISA_MEM_ADDR
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#define PCI_DRAM_OFFSET 0x80000000
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#else
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#define _IO_BASE 0
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#define _ISA_MEM_BASE 0
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#define PCI_DRAM_OFFSET 0
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#endif
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#else
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#if !defined(_IO_BASE) /* defined in board specific header */
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#define _IO_BASE 0
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#endif
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#define _ISA_MEM_BASE 0
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#define PCI_DRAM_OFFSET 0
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#endif
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#ifndef __ASSEMBLY__
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/* The "residual" data board information structure the boot loader
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* hands to us.
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*/
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extern unsigned char __res[];
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struct pt_regs;
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enum ppc_sys_devices {
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MPC8xx_CPM_FEC1,
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MPC8xx_CPM_FEC2,
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MPC8xx_CPM_I2C,
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MPC8xx_CPM_SCC1,
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MPC8xx_CPM_SCC2,
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MPC8xx_CPM_SCC3,
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MPC8xx_CPM_SCC4,
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MPC8xx_CPM_SPI,
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MPC8xx_CPM_MCC1,
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MPC8xx_CPM_MCC2,
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MPC8xx_CPM_SMC1,
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MPC8xx_CPM_SMC2,
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MPC8xx_CPM_USB,
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MPC8xx_MDIO_FEC,
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NUM_PPC_SYS_DEVS,
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};
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#define PPC_PIN_SIZE (24 * 1024 * 1024) /* 24Mbytes of data pinned */
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#ifndef BOARD_CHIP_NAME
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#define BOARD_CHIP_NAME ""
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#endif
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#endif /* !__ASSEMBLY__ */
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#endif /* CONFIG_8xx */
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#endif /* __CONFIG_8xx_DEFS */
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#endif /* __KERNEL__ */
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