136 lines
3.2 KiB
C
136 lines
3.2 KiB
C
/*
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* i8253.c 8253/PIT functions
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*
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*/
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#include <linux/clockchips.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/jiffies.h>
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#include <linux/module.h>
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#include <linux/smp.h>
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#include <linux/spinlock.h>
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#include <linux/irq.h>
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#include <asm/delay.h>
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#include <asm/i8253.h>
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#include <asm/io.h>
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#include <asm/time.h>
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DEFINE_RAW_SPINLOCK(i8253_lock);
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EXPORT_SYMBOL(i8253_lock);
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/*
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* Initialize the PIT timer.
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*
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* This is also called after resume to bring the PIT into operation again.
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*/
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static void init_pit_timer(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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raw_spin_lock(&i8253_lock);
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switch(mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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/* binary, mode 2, LSB/MSB, ch 0 */
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outb_p(0x34, PIT_MODE);
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outb_p(LATCH & 0xff , PIT_CH0); /* LSB */
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outb(LATCH >> 8 , PIT_CH0); /* MSB */
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break;
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case CLOCK_EVT_MODE_SHUTDOWN:
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case CLOCK_EVT_MODE_UNUSED:
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if (evt->mode == CLOCK_EVT_MODE_PERIODIC ||
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evt->mode == CLOCK_EVT_MODE_ONESHOT) {
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outb_p(0x30, PIT_MODE);
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outb_p(0, PIT_CH0);
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outb_p(0, PIT_CH0);
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}
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break;
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case CLOCK_EVT_MODE_ONESHOT:
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/* One shot setup */
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outb_p(0x38, PIT_MODE);
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break;
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case CLOCK_EVT_MODE_RESUME:
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/* Nothing to do here */
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break;
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}
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raw_spin_unlock(&i8253_lock);
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}
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/*
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* Program the next event in oneshot mode
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*
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* Delta is given in PIT ticks
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*/
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static int pit_next_event(unsigned long delta, struct clock_event_device *evt)
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{
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raw_spin_lock(&i8253_lock);
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outb_p(delta & 0xff , PIT_CH0); /* LSB */
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outb(delta >> 8 , PIT_CH0); /* MSB */
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raw_spin_unlock(&i8253_lock);
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return 0;
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}
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/*
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* On UP the PIT can serve all of the possible timer functions. On SMP systems
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* it can be solely used for the global tick.
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*
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* The profiling and update capabilites are switched off once the local apic is
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* registered. This mechanism replaces the previous #ifdef LOCAL_APIC -
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* !using_apic_timer decisions in do_timer_interrupt_hook()
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*/
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static struct clock_event_device pit_clockevent = {
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.name = "pit",
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.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT,
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.set_mode = init_pit_timer,
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.set_next_event = pit_next_event,
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.irq = 0,
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};
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static irqreturn_t timer_interrupt(int irq, void *dev_id)
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{
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pit_clockevent.event_handler(&pit_clockevent);
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return IRQ_HANDLED;
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}
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static struct irqaction irq0 = {
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.handler = timer_interrupt,
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.flags = IRQF_DISABLED | IRQF_NOBALANCING | IRQF_TIMER,
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.name = "timer"
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};
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/*
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* Initialize the conversion factor and the min/max deltas of the clock event
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* structure and register the clock event source with the framework.
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*/
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void __init setup_pit_timer(void)
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{
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struct clock_event_device *cd = &pit_clockevent;
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unsigned int cpu = smp_processor_id();
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/*
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* Start pit with the boot cpu mask and make it global after the
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* IO_APIC has been initialized.
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*/
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cd->cpumask = cpumask_of(cpu);
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clockevent_set_clock(cd, CLOCK_TICK_RATE);
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cd->max_delta_ns = clockevent_delta2ns(0x7FFF, cd);
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cd->min_delta_ns = clockevent_delta2ns(0xF, cd);
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clockevents_register_device(cd);
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setup_irq(0, &irq0);
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}
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static int __init init_pit_clocksource(void)
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{
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if (num_possible_cpus() > 1) /* PIT does not scale! */
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return 0;
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return clocksource_i8253_init();
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}
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arch_initcall(init_pit_clocksource);
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