linux/drivers/clk/hisilicon
Wei Yongjun 9903e41ae1 clk: hisilicon: hi3660:Fix potential NULL dereference in hi3660_stub_clk_probe()
platform_get_resource() may return NULL, add proper check to
avoid potential NULL dereferencing.

This is detected by Coccinelle semantic patch.

@@
expression pdev, res, n, t, e, e1, e2;
@@

res = platform_get_resource(pdev, t, n);
+ if (!res)
+   return -EINVAL;
... when != res == NULL
e = devm_ioremap(e1, res->start, e2);

Fixes: 4f16f7ff3b ("clk: hisilicon: Add support for Hi3660 stub clocks")
Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2018-03-12 15:12:26 -07:00
..
Kconfig clk: hisilicon: Add support for Hi3660 stub clocks 2017-12-06 23:01:46 -08:00
Makefile clk: hisilicon: Add support for Hi3660 stub clocks 2017-12-06 23:01:46 -08:00
clk-hi3519.c clk: hisilicon: hi3519: add driver remove path and fix some issues 2016-06-30 12:35:20 -07:00
clk-hi3620.c clk: hisilicon: make clk_ops const 2017-11-01 23:25:45 -07:00
clk-hi3660-stub.c clk: hisilicon: hi3660:Fix potential NULL dereference in hi3660_stub_clk_probe() 2018-03-12 15:12:26 -07:00
clk-hi3660.c clk: hi3660: fix incorrect uart3 clock freqency 2017-11-14 09:48:59 -08:00
clk-hi6220-stub.c clk: hisilicon: Remove CLK_IS_ROOT 2016-03-02 17:43:32 -08:00
clk-hi6220.c clk: hi6220: mark clock cs_atb_syspll as critical 2017-11-01 16:39:03 +01:00
clk-hip04.c clk: hisilicon: Remove CLK_IS_ROOT 2016-03-02 17:43:32 -08:00
clk-hix5hd2.c clk: hisilicon: make clk_ops const 2017-11-01 23:25:45 -07:00
clk.c clk: hisilicon: Delete error messages for failed memory allocations in hisi_clk_init() 2017-04-19 10:45:52 -07:00
clk.h clk: hisilicon: add hisi_clk_unregister_* functions 2016-06-30 12:35:18 -07:00
clkdivider-hi6220.c clk: divider: fix incorrect usage of container_of 2017-12-28 15:16:04 -08:00
clkgate-separated.c Merge branch 'clk-const' into clk-next 2017-11-14 10:07:38 -08:00
crg-hi3516cv300.c clk: hisilicon: add CRG driver for Hi3516CV300 SoC 2016-11-14 12:04:39 -08:00
crg-hi3798cv200.c clk: hi3798cv200: correct parent mux clock for 'clk_sdio0_ciu' 2017-11-14 09:49:00 -08:00
crg.h clk: hisilicon: add CRG driver for Hi3798CV200 SoC 2016-11-11 15:43:49 -08:00
reset.c reset: hisilicon: change the definition of hisi_reset_init 2016-06-30 12:33:22 -07:00
reset.h reset: hisilicon: change the definition of hisi_reset_init 2016-06-30 12:33:22 -07:00