linux/drivers/clk/meson
weiyongjun (A) 9d548d8038 clk: meson-axg: fix potential NULL dereference in axg_clkc_probe()
platform_get_resource() may return NULL, add proper
check to avoid potential NULL dereferencing.

This is detected by Coccinelle semantic patch.

@@
expression pdev, res, n, t, e, e1, e2;
@@

res = platform_get_resource(pdev, t, n);
+ if (!res)
+   return -EINVAL;
... when != res == NULL
e = devm_ioremap(e1, res->start, e2);

Signed-off-by: Wei Yongjun <weiyongjun1@huawei.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
2018-01-10 13:24:36 -08:00
..
Kconfig clk: meson-axg: add clock controller drivers 2017-12-14 10:19:37 +01:00
Makefile clk: meson-axg: add clock controller drivers 2017-12-14 10:19:37 +01:00
axg.c clk: meson-axg: fix potential NULL dereference in axg_clkc_probe() 2018-01-10 13:24:36 -08:00
axg.h clk: meson-axg: add clock controller drivers 2017-12-14 10:19:37 +01:00
clk-audio-divider.c clk: meson: add audio clock divider support 2017-04-07 16:50:44 +02:00
clk-cpu.c clk: meson8b: clean up cpu clocks 2016-06-22 18:02:35 -07:00
clk-mpll.c clk: meson: mpll: use 64-bit maths in params_from_rate 2017-12-23 23:14:20 +01:00
clk-pll.c clk: meson: Add support for parameters for specific PLLs 2017-04-04 12:05:12 -07:00
clkc.h clk: meson: make the spinlock naming more specific 2017-12-14 10:12:41 +01:00
gxbb-aoclk-32k.c clk: meson: gxbb-aoclk: Add CEC 32k clock 2017-08-04 18:02:02 +02:00
gxbb-aoclk-regmap.c clk: meson: gxbb-aoclk: Switch to regmap for register access 2017-08-04 18:02:01 +02:00
gxbb-aoclk.c clk: meson: gxbb-aoclk: Add CEC 32k clock 2017-08-04 18:02:02 +02:00
gxbb-aoclk.h clk: meson: gxbb-aoclk: Add CEC 32k clock 2017-08-04 18:02:02 +02:00
gxbb.c clk: meson: make the spinlock naming more specific 2017-12-14 10:12:41 +01:00
gxbb.h clk: meson: gxbb: Add VPU and VAPB clockids 2017-10-20 10:24:30 +02:00
meson8b.c clk: meson: make the spinlock naming more specific 2017-12-14 10:12:41 +01:00
meson8b.h clk: meson: meson8b: register the built-in reset controller 2017-08-04 18:01:58 +02:00