272 lines
7.3 KiB
C
272 lines
7.3 KiB
C
/******************************************************************************
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*
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* Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of version 2 of the GNU General Public License as
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* published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
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*
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*
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******************************************************************************/
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#ifndef __RTW_PWRCTRL_H_
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#define __RTW_PWRCTRL_H_
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#include <osdep_service.h>
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#include <drv_types.h>
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#define FW_PWR0 0
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#define FW_PWR1 1
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#define FW_PWR2 2
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#define FW_PWR3 3
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#define HW_PWR0 7
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#define HW_PWR1 6
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#define HW_PWR2 2
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#define HW_PWR3 0
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#define HW_PWR4 8
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#define FW_PWRMSK 0x7
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#define XMIT_ALIVE BIT(0)
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#define RECV_ALIVE BIT(1)
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#define CMD_ALIVE BIT(2)
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#define EVT_ALIVE BIT(3)
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enum power_mgnt {
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PS_MODE_ACTIVE = 0,
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PS_MODE_MIN,
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PS_MODE_MAX,
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PS_MODE_DTIM,
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PS_MODE_VOIP,
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PS_MODE_UAPSD_WMM,
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PS_MODE_UAPSD,
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PS_MODE_IBSS,
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PS_MODE_WWLAN,
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PM_Radio_Off,
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PM_Card_Disable,
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PS_MODE_NUM
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};
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/*
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BIT[2:0] = HW state
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BIT[3] = Protocol PS state, 0: register active state,
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1: register sleep state
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BIT[4] = sub-state
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*/
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#define PS_DPS BIT(0)
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#define PS_LCLK (PS_DPS)
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#define PS_RF_OFF BIT(1)
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#define PS_ALL_ON BIT(2)
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#define PS_ST_ACTIVE BIT(3)
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#define PS_ISR_ENABLE BIT(4)
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#define PS_IMR_ENABLE BIT(5)
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#define PS_ACK BIT(6)
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#define PS_TOGGLE BIT(7)
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#define PS_STATE_MASK (0x0F)
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#define PS_STATE_HW_MASK (0x07)
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#define PS_SEQ_MASK (0xc0)
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#define PS_STATE(x) (PS_STATE_MASK & (x))
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#define PS_STATE_HW(x) (PS_STATE_HW_MASK & (x))
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#define PS_SEQ(x) (PS_SEQ_MASK & (x))
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#define PS_STATE_S0 (PS_DPS)
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#define PS_STATE_S1 (PS_LCLK)
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#define PS_STATE_S2 (PS_RF_OFF)
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#define PS_STATE_S3 (PS_ALL_ON)
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#define PS_STATE_S4 ((PS_ST_ACTIVE) | (PS_ALL_ON))
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#define PS_IS_RF_ON(x) ((x) & (PS_ALL_ON))
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#define PS_IS_ACTIVE(x) ((x) & (PS_ST_ACTIVE))
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#define CLR_PS_STATE(x) ((x) = ((x) & (0xF0)))
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struct reportpwrstate_parm {
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unsigned char mode;
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unsigned char state; /* the CPWM value */
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unsigned short rsvd;
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};
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static inline void _init_pwrlock(struct semaphore *plock)
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{
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sema_init(plock, 1);
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}
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static inline void _enter_pwrlock(struct semaphore *plock)
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{
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_rtw_down_sema(plock);
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}
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static inline void _exit_pwrlock(struct semaphore *plock)
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{
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up(plock);
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}
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#define LPS_DELAY_TIME 1*HZ /* 1 sec */
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#define EXE_PWR_NONE 0x01
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#define EXE_PWR_IPS 0x02
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#define EXE_PWR_LPS 0x04
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/* RF state. */
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enum rt_rf_power_state {
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rf_on, /* RF is on after RFSleep or RFOff */
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rf_sleep, /* 802.11 Power Save mode */
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rf_off, /* HW/SW Radio OFF or Inactive Power Save */
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/* Add the new RF state above this line===== */
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rf_max
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};
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/* RF Off Level for IPS or HW/SW radio off */
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#define RT_RF_OFF_LEVL_ASPM BIT(0) /* PCI ASPM */
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#define RT_RF_OFF_LEVL_CLK_REQ BIT(1) /* PCI clock request */
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#define RT_RF_OFF_LEVL_PCI_D3 BIT(2) /* PCI D3 mode */
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#define RT_RF_OFF_LEVL_HALT_NIC BIT(3) /* NIC halt, re-init hw param*/
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#define RT_RF_OFF_LEVL_FREE_FW BIT(4) /* FW free, re-download the FW*/
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#define RT_RF_OFF_LEVL_FW_32K BIT(5) /* FW in 32k */
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#define RT_RF_PS_LEVEL_ALWAYS_ASPM BIT(6) /* Always enable ASPM and Clock
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* Req in initialization. */
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#define RT_RF_LPS_DISALBE_2R BIT(30) /* When LPS is on, disable 2R
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* if no packet is RX or TX. */
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#define RT_RF_LPS_LEVEL_ASPM BIT(31) /* LPS with ASPM */
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#define RT_IN_PS_LEVEL(ppsc, _PS_FLAG) \
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((ppsc->cur_ps_level & _PS_FLAG) ? true : false)
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#define RT_CLEAR_PS_LEVEL(ppsc, _PS_FLAG) \
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(ppsc->cur_ps_level &= (~(_PS_FLAG)))
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#define RT_SET_PS_LEVEL(ppsc, _PS_FLAG) \
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(ppsc->cur_ps_level |= _PS_FLAG)
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enum _PS_BBRegBackup_ {
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PSBBREG_RF0 = 0,
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PSBBREG_RF1,
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PSBBREG_RF2,
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PSBBREG_AFE0,
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PSBBREG_TOTALCNT
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};
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enum { /* for ips_mode */
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IPS_NONE = 0,
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IPS_NORMAL,
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IPS_LEVEL_2,
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};
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struct pwrctrl_priv {
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struct semaphore lock;
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volatile u8 rpwm; /* requested power state for fw */
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volatile u8 cpwm; /* fw current power state. updated when
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* 1. read from HCPWM 2. driver lowers power level */
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volatile u8 tog; /* toggling */
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volatile u8 cpwm_tog; /* toggling */
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u8 pwr_mode;
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u8 smart_ps;
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u8 bcn_ant_mode;
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u32 alives;
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struct work_struct cpwm_event;
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u8 bpower_saving;
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u8 b_hw_radio_off;
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u8 reg_rfoff;
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u8 reg_pdnmode; /* powerdown mode */
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u32 rfoff_reason;
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/* RF OFF Level */
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u32 cur_ps_level;
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u32 reg_rfps_level;
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uint ips_enter_cnts;
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uint ips_leave_cnts;
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u8 ips_mode;
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u8 ips_mode_req; /* used to accept the mode setting request,
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* will update to ipsmode later */
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uint bips_processing;
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unsigned long ips_deny_time; /* will deny IPS when system time less than this */
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u8 ps_processing; /* temp used to mark whether in rtw_ps_processor */
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u8 bLeisurePs;
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u8 LpsIdleCount;
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u8 power_mgnt;
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u8 bFwCurrentInPSMode;
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u32 DelayLPSLastTimeStamp;
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u8 btcoex_rfon;
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s32 pnp_current_pwr_state;
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u8 pnp_bstop_trx;
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u8 bInternalAutoSuspend;
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u8 bInSuspend;
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u8 bSupportRemoteWakeup;
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struct timer_list pwr_state_check_timer;
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int pwr_state_check_interval;
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u8 pwr_state_check_cnts;
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int ps_flag;
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enum rt_rf_power_state rf_pwrstate;/* cur power state */
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enum rt_rf_power_state change_rfpwrstate;
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u8 wepkeymask;
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u8 bHWPowerdown;/* if support hw power down */
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u8 bHWPwrPindetect;
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u8 bkeepfwalive;
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u8 brfoffbyhw;
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unsigned long PS_BBRegBackup[PSBBREG_TOTALCNT];
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};
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#define rtw_get_ips_mode_req(pwrctrlpriv) \
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(pwrctrlpriv)->ips_mode_req
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#define rtw_ips_mode_req(pwrctrlpriv, ips_mode) \
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((pwrctrlpriv)->ips_mode_req = (ips_mode))
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#define RTW_PWR_STATE_CHK_INTERVAL 2000
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#define _rtw_set_pwr_state_check_timer(pwrctrlpriv, ms) \
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do { \
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_set_timer(&(pwrctrlpriv)->pwr_state_check_timer, (ms)); \
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} while (0)
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#define rtw_set_pwr_state_check_timer(pwrctrl) \
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_rtw_set_pwr_state_check_timer((pwrctrl), \
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(pwrctrl)->pwr_state_check_interval)
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void rtw_init_pwrctrl_priv(struct adapter *adapter);
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void rtw_set_ps_mode(struct adapter *adapter, u8 ps_mode, u8 smart_ps,
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u8 bcn_ant_mode);
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void rtw_set_rpwm(struct adapter *adapter, u8 val8);
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void LeaveAllPowerSaveMode(struct adapter *adapter);
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void ips_enter(struct adapter *padapter);
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int ips_leave(struct adapter *padapter);
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void rtw_ps_processor(struct adapter *padapter);
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enum rt_rf_power_state RfOnOffDetect(struct adapter *iadapter);
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s32 LPS_RF_ON_check(struct adapter *adapter, u32 delay_ms);
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void LPS_Enter(struct adapter *adapter);
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void LPS_Leave(struct adapter *adapter);
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void rtw_set_ips_deny(struct adapter *adapter, u32 ms);
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int _rtw_pwr_wakeup(struct adapter *adapter, u32 ips_defer_ms,
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const char *caller);
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#define rtw_pwr_wakeup(adapter) \
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_rtw_pwr_wakeup(adapter, RTW_PWR_STATE_CHK_INTERVAL, __func__)
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#define rtw_pwr_wakeup_ex(adapter, ips_deffer_ms) \
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_rtw_pwr_wakeup(adapter, ips_deffer_ms, __func__)
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int rtw_pm_set_ips(struct adapter *adapter, u8 mode);
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int rtw_pm_set_lps(struct adapter *adapter, u8 mode);
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#endif /* __RTL871X_PWRCTRL_H_ */
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