396 lines
10 KiB
C
396 lines
10 KiB
C
/*
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* Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
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* All rights reserved.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
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*
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* File: desc.h
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*
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* Purpose:The header file of descriptor
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*
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* Revision History:
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*
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* Author: Tevin Chen
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*
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* Date: May 21, 1996
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*
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*/
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#ifndef __DESC_H__
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#define __DESC_H__
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#include <linux/types.h>
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#include <linux/mm.h>
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#include "linux/ieee80211.h"
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#include "ttype.h"
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#include "tether.h"
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#define B_OWNED_BY_CHIP 1
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#define B_OWNED_BY_HOST 0
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//
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// Bits in the RSR register
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//
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#define RSR_ADDRBROAD 0x80
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#define RSR_ADDRMULTI 0x40
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#define RSR_ADDRUNI 0x00
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#define RSR_IVLDTYP 0x20
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#define RSR_IVLDLEN 0x10 // invalid len (> 2312 byte)
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#define RSR_BSSIDOK 0x08
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#define RSR_CRCOK 0x04
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#define RSR_BCNSSIDOK 0x02
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#define RSR_ADDROK 0x01
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//
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// Bits in the new RSR register
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//
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#define NEWRSR_DECRYPTOK 0x10
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#define NEWRSR_CFPIND 0x08
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#define NEWRSR_HWUTSF 0x04
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#define NEWRSR_BCNHITAID 0x02
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#define NEWRSR_BCNHITAID0 0x01
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//
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// Bits in the TSR0 register
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//
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#define TSR0_PWRSTS1_2 0xC0
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#define TSR0_PWRSTS7 0x20
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#define TSR0_NCR 0x1F
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//
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// Bits in the TSR1 register
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//
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#define TSR1_TERR 0x80
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#define TSR1_PWRSTS4_6 0x70
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#define TSR1_RETRYTMO 0x08
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#define TSR1_TMO 0x04
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#define TSR1_PWRSTS3 0x02
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#define ACK_DATA 0x01
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//
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// Bits in the TCR register
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//
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#define EDMSDU 0x04 // end of sdu
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#define TCR_EDP 0x02 // end of packet
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#define TCR_STP 0x01 // start of packet
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// max transmit or receive buffer size
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#define CB_MAX_BUF_SIZE 2900U
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// NOTE: must be multiple of 4
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#define CB_MAX_TX_BUF_SIZE CB_MAX_BUF_SIZE
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#define CB_MAX_RX_BUF_SIZE_NORMAL CB_MAX_BUF_SIZE
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#define CB_BEACON_BUF_SIZE 512U
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#define CB_MAX_RX_DESC 128
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#define CB_MIN_RX_DESC 16
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#define CB_MAX_TX_DESC 64
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#define CB_MIN_TX_DESC 16
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#define CB_MAX_RECEIVED_PACKETS 16
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// limit our receive routine to indicating
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// this many at a time for 2 reasons:
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// 1. driver flow control to protocol layer
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// 2. limit the time used in ISR routine
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#define CB_EXTRA_RD_NUM 32
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#define CB_RD_NUM 32
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#define CB_TD_NUM 32
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// max number of physical segments
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// in a single NDIS packet. Above this threshold, the packet
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// is copied into a single physically contiguous buffer
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#define CB_MAX_SEGMENT 4
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#define CB_MIN_MAP_REG_NUM 4
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#define CB_MAX_MAP_REG_NUM CB_MAX_TX_DESC
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#define CB_PROTOCOL_RESERVED_SECTION 16
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// if retrys excess 15 times , tx will abort, and
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// if tx fifo underflow, tx will fail
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// we should try to resend it
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#define CB_MAX_TX_ABORT_RETRY 3
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#ifdef __BIG_ENDIAN
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// WMAC definition FIFO Control
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#define FIFOCTL_AUTO_FB_1 0x0010
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#define FIFOCTL_AUTO_FB_0 0x0008
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#define FIFOCTL_GRPACK 0x0004
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#define FIFOCTL_11GA 0x0003
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#define FIFOCTL_11GB 0x0002
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#define FIFOCTL_11B 0x0001
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#define FIFOCTL_11A 0x0000
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#define FIFOCTL_RTS 0x8000
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#define FIFOCTL_ISDMA0 0x4000
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#define FIFOCTL_GENINT 0x2000
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#define FIFOCTL_TMOEN 0x1000
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#define FIFOCTL_LRETRY 0x0800
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#define FIFOCTL_CRCDIS 0x0400
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#define FIFOCTL_NEEDACK 0x0200
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#define FIFOCTL_LHEAD 0x0100
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//WMAC definition Frag Control
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#define FRAGCTL_AES 0x0003
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#define FRAGCTL_TKIP 0x0002
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#define FRAGCTL_LEGACY 0x0001
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#define FRAGCTL_NONENCRYPT 0x0000
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#define FRAGCTL_ENDFRAG 0x0300
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#define FRAGCTL_MIDFRAG 0x0200
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#define FRAGCTL_STAFRAG 0x0100
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#define FRAGCTL_NONFRAG 0x0000
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#else
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#define FIFOCTL_AUTO_FB_1 0x1000
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#define FIFOCTL_AUTO_FB_0 0x0800
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#define FIFOCTL_GRPACK 0x0400
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#define FIFOCTL_11GA 0x0300
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#define FIFOCTL_11GB 0x0200
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#define FIFOCTL_11B 0x0100
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#define FIFOCTL_11A 0x0000
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#define FIFOCTL_RTS 0x0080
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#define FIFOCTL_ISDMA0 0x0040
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#define FIFOCTL_GENINT 0x0020
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#define FIFOCTL_TMOEN 0x0010
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#define FIFOCTL_LRETRY 0x0008
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#define FIFOCTL_CRCDIS 0x0004
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#define FIFOCTL_NEEDACK 0x0002
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#define FIFOCTL_LHEAD 0x0001
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//WMAC definition Frag Control
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#define FRAGCTL_AES 0x0300
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#define FRAGCTL_TKIP 0x0200
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#define FRAGCTL_LEGACY 0x0100
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#define FRAGCTL_NONENCRYPT 0x0000
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#define FRAGCTL_ENDFRAG 0x0003
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#define FRAGCTL_MIDFRAG 0x0002
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#define FRAGCTL_STAFRAG 0x0001
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#define FRAGCTL_NONFRAG 0x0000
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#endif
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#define TYPE_TXDMA0 0
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#define TYPE_AC0DMA 1
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#define TYPE_ATIMDMA 2
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#define TYPE_SYNCDMA 3
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#define TYPE_MAXTD 2
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#define TYPE_BEACONDMA 4
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#define TYPE_RXDMA0 0
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#define TYPE_RXDMA1 1
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#define TYPE_MAXRD 2
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// TD_INFO flags control bit
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#define TD_FLAGS_NETIF_SKB 0x01 // check if need release skb
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#define TD_FLAGS_PRIV_SKB 0x02 // check if called from private skb(hostap)
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#define TD_FLAGS_PS_RETRY 0x04 // check if PS STA frame re-transmit
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// ref_sk_buff is used for mapping the skb structure between pre-built driver-obj & running kernel.
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// Since different kernel version (2.4x) may change skb structure, i.e. pre-built driver-obj
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// may link to older skb that leads error.
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typedef struct tagDEVICE_RD_INFO {
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struct sk_buff *skb;
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dma_addr_t skb_dma;
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dma_addr_t curr_desc;
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} DEVICE_RD_INFO, *PDEVICE_RD_INFO;
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#ifdef __BIG_ENDIAN
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typedef struct tagRDES0 {
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volatile unsigned short wResCount;
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union {
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volatile u16 f15Reserved;
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struct {
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volatile u8 f8Reserved1;
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volatile u8 f1Owner:1;
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volatile u8 f7Reserved:7;
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} __attribute__ ((__packed__));
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} __attribute__ ((__packed__));
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} __attribute__ ((__packed__))
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SRDES0, *PSRDES0;
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#else
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typedef struct tagRDES0 {
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unsigned short wResCount;
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unsigned short f15Reserved:15;
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unsigned short f1Owner:1;
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} __attribute__ ((__packed__))
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SRDES0;
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#endif
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typedef struct tagRDES1 {
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unsigned short wReqCount;
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unsigned short wReserved;
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} __attribute__ ((__packed__))
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SRDES1;
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//
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// Rx descriptor
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//
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typedef struct tagSRxDesc {
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volatile SRDES0 m_rd0RD0;
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volatile SRDES1 m_rd1RD1;
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volatile u32 buff_addr;
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volatile u32 next_desc;
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struct tagSRxDesc *next __aligned(8);
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volatile PDEVICE_RD_INFO pRDInfo __aligned(8);
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} __attribute__ ((__packed__))
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SRxDesc, *PSRxDesc;
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typedef const SRxDesc *PCSRxDesc;
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#ifdef __BIG_ENDIAN
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typedef struct tagTDES0 {
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volatile unsigned char byTSR0;
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volatile unsigned char byTSR1;
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union {
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volatile u16 f15Txtime;
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struct {
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volatile u8 f8Reserved1;
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volatile u8 f1Owner:1;
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volatile u8 f7Reserved:7;
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} __attribute__ ((__packed__));
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} __attribute__ ((__packed__));
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} __attribute__ ((__packed__))
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STDES0, PSTDES0;
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#else
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typedef struct tagTDES0 {
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volatile unsigned char byTSR0;
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volatile unsigned char byTSR1;
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volatile unsigned short f15Txtime:15;
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volatile unsigned short f1Owner:1;
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} __attribute__ ((__packed__))
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STDES0;
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#endif
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typedef struct tagTDES1 {
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volatile unsigned short wReqCount;
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volatile unsigned char byTCR;
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volatile unsigned char byReserved;
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} __attribute__ ((__packed__))
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STDES1;
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typedef struct tagDEVICE_TD_INFO {
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struct sk_buff *skb;
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unsigned char *buf;
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dma_addr_t skb_dma;
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dma_addr_t buf_dma;
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dma_addr_t curr_desc;
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unsigned long dwReqCount;
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unsigned long dwHeaderLength;
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unsigned char byFlags;
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} DEVICE_TD_INFO, *PDEVICE_TD_INFO;
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//
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// transmit descriptor
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//
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typedef struct tagSTxDesc {
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volatile STDES0 m_td0TD0;
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volatile STDES1 m_td1TD1;
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volatile u32 buff_addr;
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volatile u32 next_desc;
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struct tagSTxDesc *next __aligned(8);
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volatile PDEVICE_TD_INFO pTDInfo __aligned(8);
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} __attribute__ ((__packed__))
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STxDesc, *PSTxDesc;
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typedef const STxDesc *PCSTxDesc;
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typedef struct tagSTxSyncDesc {
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volatile STDES0 m_td0TD0;
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volatile STDES1 m_td1TD1;
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volatile u32 buff_addr; // pointer to logical buffer
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volatile u32 next_desc; // pointer to next logical descriptor
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volatile unsigned short m_wFIFOCtl;
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volatile unsigned short m_wTimeStamp;
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struct tagSTxSyncDesc *next __aligned(8);
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volatile PDEVICE_TD_INFO pTDInfo __aligned(8);
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} __attribute__ ((__packed__))
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STxSyncDesc, *PSTxSyncDesc;
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typedef const STxSyncDesc *PCSTxSyncDesc;
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//
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// RsvTime buffer header
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//
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typedef struct tagSRrvTime_atim {
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unsigned short wCTSTxRrvTime_ba;
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unsigned short wTxRrvTime_a;
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} __attribute__ ((__packed__))
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SRrvTime_atim, *PSRrvTime_atim;
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typedef const SRrvTime_atim *PCSRrvTime_atim;
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/* Length, Service, and Signal fields of Phy for Tx */
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struct vnt_phy_field {
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u8 signal;
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u8 service;
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__le16 len;
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} __packed;
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union vnt_phy_field_swap {
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struct vnt_phy_field field_read;
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u16 swap[2];
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u32 field_write;
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};
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//
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// Tx FIFO header
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//
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typedef struct tagSTxBufHead {
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u32 adwTxKey[4];
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unsigned short wFIFOCtl;
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unsigned short wTimeStamp;
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unsigned short wFragCtl;
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unsigned char byTxPower;
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unsigned char wReserved;
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} __attribute__ ((__packed__))
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STxBufHead, *PSTxBufHead;
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typedef const STxBufHead *PCSTxBufHead;
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typedef struct tagSBEACONCtl {
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u32 BufReady:1;
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u32 TSF:15;
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u32 BufLen:11;
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u32 Reserved:5;
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} __attribute__ ((__packed__))
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SBEACONCtl;
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typedef struct tagSSecretKey {
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u32 dwLowDword;
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unsigned char byHighByte;
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} __attribute__ ((__packed__))
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SSecretKey;
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typedef struct tagSKeyEntry {
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unsigned char abyAddrHi[2];
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unsigned short wKCTL;
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unsigned char abyAddrLo[4];
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u32 dwKey0[4];
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u32 dwKey1[4];
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u32 dwKey2[4];
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u32 dwKey3[4];
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u32 dwKey4[4];
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} __attribute__ ((__packed__))
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SKeyEntry;
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#endif // __DESC_H__
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