The Power ISA 2.06 added power of two page sizes to the embedded MMU architecture. Its done it such a way to be code compatiable with the existing HW. Made the minor code changes to support both power of two and power of four page sizes. Also added some new MAS bits and macros that are defined as part of the 2.06 ISA. Renamed some things to use the 'Book-3e' concept to convey the new MMU that is based on the Freescale Book-E MMU programming model. Note, its still invalid to try and use a page size that isn't supported by cpu. Signed-off-by: Kumar Gala <galak@kernel.crashing.org> |
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boot | ||
configs | ||
include/asm | ||
kernel | ||
kvm | ||
lib | ||
math-emu | ||
mm | ||
oprofile | ||
platforms | ||
sysdev | ||
xmon | ||
Kconfig | ||
Kconfig.debug | ||
Makefile |