d7813bc9e8
This plugs in entry sizing support for existing mappings and then builds on top of that for linking together entries that are mapping contiguous areas. This will ultimately permit us to coalesce mappings and promote head pages while reclaiming PMB slots for dynamic remapping. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
515 lines
11 KiB
C
515 lines
11 KiB
C
/*
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* arch/sh/mm/pmb.c
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*
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* Privileged Space Mapping Buffer (PMB) Support.
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*
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* Copyright (C) 2005 - 2010 Paul Mundt
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* Copyright (C) 2010 Matt Fleming
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/init.h>
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#include <linux/kernel.h>
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#include <linux/sysdev.h>
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#include <linux/cpu.h>
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#include <linux/module.h>
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#include <linux/slab.h>
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#include <linux/bitops.h>
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#include <linux/debugfs.h>
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#include <linux/fs.h>
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#include <linux/seq_file.h>
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#include <linux/err.h>
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#include <linux/io.h>
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#include <asm/sizes.h>
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#include <asm/system.h>
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#include <asm/uaccess.h>
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#include <asm/pgtable.h>
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#include <asm/page.h>
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#include <asm/mmu.h>
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#include <asm/mmu_context.h>
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static void pmb_unmap_entry(struct pmb_entry *);
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static struct pmb_entry pmb_entry_list[NR_PMB_ENTRIES];
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static DECLARE_BITMAP(pmb_map, NR_PMB_ENTRIES);
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static __always_inline unsigned long mk_pmb_entry(unsigned int entry)
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{
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return (entry & PMB_E_MASK) << PMB_E_SHIFT;
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}
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static __always_inline unsigned long mk_pmb_addr(unsigned int entry)
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{
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return mk_pmb_entry(entry) | PMB_ADDR;
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}
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static __always_inline unsigned long mk_pmb_data(unsigned int entry)
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{
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return mk_pmb_entry(entry) | PMB_DATA;
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}
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static int pmb_alloc_entry(void)
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{
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unsigned int pos;
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repeat:
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pos = find_first_zero_bit(pmb_map, NR_PMB_ENTRIES);
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if (unlikely(pos > NR_PMB_ENTRIES))
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return -ENOSPC;
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if (test_and_set_bit(pos, pmb_map))
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goto repeat;
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return pos;
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}
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static struct pmb_entry *pmb_alloc(unsigned long vpn, unsigned long ppn,
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unsigned long flags, int entry)
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{
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struct pmb_entry *pmbe;
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int pos;
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if (entry == PMB_NO_ENTRY) {
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pos = pmb_alloc_entry();
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if (pos < 0)
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return ERR_PTR(pos);
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} else {
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if (test_and_set_bit(entry, pmb_map))
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return ERR_PTR(-ENOSPC);
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pos = entry;
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}
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pmbe = &pmb_entry_list[pos];
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if (!pmbe)
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return ERR_PTR(-ENOMEM);
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pmbe->vpn = vpn;
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pmbe->ppn = ppn;
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pmbe->flags = flags;
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pmbe->entry = pos;
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pmbe->size = 0;
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return pmbe;
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}
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static void pmb_free(struct pmb_entry *pmbe)
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{
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clear_bit(pmbe->entry, pmb_map);
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pmbe->entry = PMB_NO_ENTRY;
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}
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/*
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* Must be run uncached.
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*/
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static void set_pmb_entry(struct pmb_entry *pmbe)
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{
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jump_to_uncached();
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__raw_writel(pmbe->vpn | PMB_V, mk_pmb_addr(pmbe->entry));
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#ifdef CONFIG_CACHE_WRITETHROUGH
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/*
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* When we are in 32-bit address extended mode, CCR.CB becomes
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* invalid, so care must be taken to manually adjust cacheable
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* translations.
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*/
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if (likely(pmbe->flags & PMB_C))
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pmbe->flags |= PMB_WT;
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#endif
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__raw_writel(pmbe->ppn | pmbe->flags | PMB_V, mk_pmb_data(pmbe->entry));
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back_to_cached();
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}
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static void clear_pmb_entry(struct pmb_entry *pmbe)
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{
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unsigned int entry = pmbe->entry;
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unsigned long addr;
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jump_to_uncached();
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/* Clear V-bit */
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addr = mk_pmb_addr(entry);
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__raw_writel(__raw_readl(addr) & ~PMB_V, addr);
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addr = mk_pmb_data(entry);
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__raw_writel(__raw_readl(addr) & ~PMB_V, addr);
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back_to_cached();
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}
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static struct {
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unsigned long size;
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int flag;
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} pmb_sizes[] = {
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{ .size = SZ_512M, .flag = PMB_SZ_512M, },
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{ .size = SZ_128M, .flag = PMB_SZ_128M, },
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{ .size = SZ_64M, .flag = PMB_SZ_64M, },
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{ .size = SZ_16M, .flag = PMB_SZ_16M, },
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};
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long pmb_remap(unsigned long vaddr, unsigned long phys,
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unsigned long size, pgprot_t prot)
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{
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struct pmb_entry *pmbp, *pmbe;
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unsigned long wanted;
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int pmb_flags, i;
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long err;
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u64 flags;
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flags = pgprot_val(prot);
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/* Convert typical pgprot value to the PMB equivalent */
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if (flags & _PAGE_CACHABLE) {
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if (flags & _PAGE_WT)
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pmb_flags = PMB_WT;
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else
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pmb_flags = PMB_C;
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} else
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pmb_flags = PMB_WT | PMB_UB;
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pmbp = NULL;
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wanted = size;
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again:
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for (i = 0; i < ARRAY_SIZE(pmb_sizes); i++) {
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if (size < pmb_sizes[i].size)
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continue;
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pmbe = pmb_alloc(vaddr, phys, pmb_flags | pmb_sizes[i].flag,
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PMB_NO_ENTRY);
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if (IS_ERR(pmbe)) {
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err = PTR_ERR(pmbe);
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goto out;
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}
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set_pmb_entry(pmbe);
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phys += pmb_sizes[i].size;
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vaddr += pmb_sizes[i].size;
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size -= pmb_sizes[i].size;
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pmbe->size = pmb_sizes[i].size;
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/*
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* Link adjacent entries that span multiple PMB entries
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* for easier tear-down.
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*/
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if (likely(pmbp))
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pmbp->link = pmbe;
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pmbp = pmbe;
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/*
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* Instead of trying smaller sizes on every iteration
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* (even if we succeed in allocating space), try using
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* pmb_sizes[i].size again.
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*/
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i--;
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}
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if (size >= 0x1000000)
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goto again;
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return wanted - size;
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out:
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pmb_unmap_entry(pmbp);
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return err;
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}
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void pmb_unmap(unsigned long addr)
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{
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struct pmb_entry *pmbe;
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int i;
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for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
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if (test_bit(i, pmb_map)) {
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pmbe = &pmb_entry_list[i];
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if (pmbe->vpn == addr) {
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pmb_unmap_entry(pmbe);
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break;
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}
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}
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}
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}
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static void pmb_unmap_entry(struct pmb_entry *pmbe)
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{
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if (unlikely(!pmbe))
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return;
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if (!test_bit(pmbe->entry, pmb_map)) {
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WARN_ON(1);
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return;
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}
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do {
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struct pmb_entry *pmblink = pmbe;
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/*
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* We may be called before this pmb_entry has been
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* entered into the PMB table via set_pmb_entry(), but
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* that's OK because we've allocated a unique slot for
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* this entry in pmb_alloc() (even if we haven't filled
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* it yet).
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*
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* Therefore, calling clear_pmb_entry() is safe as no
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* other mapping can be using that slot.
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*/
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clear_pmb_entry(pmbe);
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pmbe = pmblink->link;
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pmb_free(pmblink);
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} while (pmbe);
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}
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static __always_inline unsigned int pmb_ppn_in_range(unsigned long ppn)
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{
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return ppn >= __pa(memory_start) && ppn < __pa(memory_end);
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}
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static int pmb_synchronize_mappings(void)
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{
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unsigned int applied = 0;
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struct pmb_entry *pmbp = NULL;
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int i, j;
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pr_info("PMB: boot mappings:\n");
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/*
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* Run through the initial boot mappings, log the established
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* ones, and blow away anything that falls outside of the valid
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* PPN range. Specifically, we only care about existing mappings
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* that impact the cached/uncached sections.
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*
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* Note that touching these can be a bit of a minefield; the boot
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* loader can establish multi-page mappings with the same caching
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* attributes, so we need to ensure that we aren't modifying a
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* mapping that we're presently executing from, or may execute
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* from in the case of straddling page boundaries.
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*
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* In the future we will have to tidy up after the boot loader by
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* jumping between the cached and uncached mappings and tearing
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* down alternating mappings while executing from the other.
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*/
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for (i = 0; i < NR_PMB_ENTRIES; i++) {
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unsigned long addr, data;
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unsigned long addr_val, data_val;
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unsigned long ppn, vpn, flags;
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unsigned int size;
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struct pmb_entry *pmbe;
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addr = mk_pmb_addr(i);
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data = mk_pmb_data(i);
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addr_val = __raw_readl(addr);
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data_val = __raw_readl(data);
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/*
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* Skip over any bogus entries
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*/
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if (!(data_val & PMB_V) || !(addr_val & PMB_V))
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continue;
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ppn = data_val & PMB_PFN_MASK;
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vpn = addr_val & PMB_PFN_MASK;
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/*
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* Only preserve in-range mappings.
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*/
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if (!pmb_ppn_in_range(ppn)) {
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/*
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* Invalidate anything out of bounds.
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*/
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__raw_writel(addr_val & ~PMB_V, addr);
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__raw_writel(data_val & ~PMB_V, data);
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continue;
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}
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/*
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* Update the caching attributes if necessary
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*/
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if (data_val & PMB_C) {
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#if defined(CONFIG_CACHE_WRITETHROUGH)
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data_val |= PMB_WT;
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#elif defined(CONFIG_CACHE_WRITEBACK)
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data_val &= ~PMB_WT;
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#else
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data_val &= ~(PMB_C | PMB_WT);
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#endif
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__raw_writel(data_val, data);
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}
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size = data_val & PMB_SZ_MASK;
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flags = size | (data_val & PMB_CACHE_MASK);
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pmbe = pmb_alloc(vpn, ppn, flags, i);
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if (IS_ERR(pmbe)) {
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WARN_ON_ONCE(1);
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continue;
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}
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for (j = 0; j < ARRAY_SIZE(pmb_sizes); j++)
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if (pmb_sizes[j].flag == size)
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pmbe->size = pmb_sizes[j].size;
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/*
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* Compare the previous entry against the current one to
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* see if the entries span a contiguous mapping. If so,
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* setup the entry links accordingly.
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*/
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if (pmbp && ((pmbe->vpn == (pmbp->vpn + pmbp->size)) &&
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(pmbe->ppn == (pmbp->ppn + pmbp->size))))
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pmbp->link = pmbe;
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pmbp = pmbe;
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pr_info("\t0x%08lx -> 0x%08lx [ %ldMB %scached ]\n",
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vpn >> PAGE_SHIFT, ppn >> PAGE_SHIFT, pmbe->size >> 20,
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(data_val & PMB_C) ? "" : "un");
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applied++;
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}
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return (applied == 0);
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}
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int pmb_init(void)
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{
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int ret;
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jump_to_uncached();
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/*
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* Sync our software copy of the PMB mappings with those in
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* hardware. The mappings in the hardware PMB were either set up
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* by the bootloader or very early on by the kernel.
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*/
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ret = pmb_synchronize_mappings();
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if (unlikely(ret == 0)) {
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back_to_cached();
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return 0;
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}
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__raw_writel(0, PMB_IRMCR);
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/* Flush out the TLB */
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__raw_writel(__raw_readl(MMUCR) | MMUCR_TI, MMUCR);
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back_to_cached();
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return 0;
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}
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bool __in_29bit_mode(void)
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{
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return (__raw_readl(PMB_PASCR) & PASCR_SE) == 0;
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}
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static int pmb_seq_show(struct seq_file *file, void *iter)
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{
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int i;
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seq_printf(file, "V: Valid, C: Cacheable, WT: Write-Through\n"
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"CB: Copy-Back, B: Buffered, UB: Unbuffered\n");
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seq_printf(file, "ety vpn ppn size flags\n");
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for (i = 0; i < NR_PMB_ENTRIES; i++) {
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unsigned long addr, data;
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unsigned int size;
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char *sz_str = NULL;
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addr = __raw_readl(mk_pmb_addr(i));
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data = __raw_readl(mk_pmb_data(i));
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size = data & PMB_SZ_MASK;
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sz_str = (size == PMB_SZ_16M) ? " 16MB":
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(size == PMB_SZ_64M) ? " 64MB":
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(size == PMB_SZ_128M) ? "128MB":
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"512MB";
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/* 02: V 0x88 0x08 128MB C CB B */
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seq_printf(file, "%02d: %c 0x%02lx 0x%02lx %s %c %s %s\n",
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i, ((addr & PMB_V) && (data & PMB_V)) ? 'V' : ' ',
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(addr >> 24) & 0xff, (data >> 24) & 0xff,
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sz_str, (data & PMB_C) ? 'C' : ' ',
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(data & PMB_WT) ? "WT" : "CB",
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(data & PMB_UB) ? "UB" : " B");
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}
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return 0;
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}
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static int pmb_debugfs_open(struct inode *inode, struct file *file)
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{
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return single_open(file, pmb_seq_show, NULL);
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}
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static const struct file_operations pmb_debugfs_fops = {
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.owner = THIS_MODULE,
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.open = pmb_debugfs_open,
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.read = seq_read,
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.llseek = seq_lseek,
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.release = single_release,
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};
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static int __init pmb_debugfs_init(void)
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{
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struct dentry *dentry;
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dentry = debugfs_create_file("pmb", S_IFREG | S_IRUGO,
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sh_debugfs_root, NULL, &pmb_debugfs_fops);
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if (!dentry)
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return -ENOMEM;
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if (IS_ERR(dentry))
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return PTR_ERR(dentry);
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return 0;
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}
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postcore_initcall(pmb_debugfs_init);
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#ifdef CONFIG_PM
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static int pmb_sysdev_suspend(struct sys_device *dev, pm_message_t state)
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{
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static pm_message_t prev_state;
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int i;
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/* Restore the PMB after a resume from hibernation */
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if (state.event == PM_EVENT_ON &&
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prev_state.event == PM_EVENT_FREEZE) {
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struct pmb_entry *pmbe;
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for (i = 0; i < ARRAY_SIZE(pmb_entry_list); i++) {
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if (test_bit(i, pmb_map)) {
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pmbe = &pmb_entry_list[i];
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set_pmb_entry(pmbe);
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}
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}
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}
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prev_state = state;
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return 0;
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}
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static int pmb_sysdev_resume(struct sys_device *dev)
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{
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return pmb_sysdev_suspend(dev, PMSG_ON);
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}
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static struct sysdev_driver pmb_sysdev_driver = {
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.suspend = pmb_sysdev_suspend,
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.resume = pmb_sysdev_resume,
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};
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static int __init pmb_sysdev_init(void)
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{
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return sysdev_driver_register(&cpu_sysdev_class, &pmb_sysdev_driver);
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}
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subsys_initcall(pmb_sysdev_init);
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#endif
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