cbf77c1bd9
Add platform support for NOR flash chips on RBTX4939 board. This board has complex flash mappings, controlled by its DIPSW setting. [akpm@linux-foundation.org: Use min_t] Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Cc: Ralf Bächle <ralf@linux-mips.org> Signed-off-by: Andrew Morton <akpm@linux-foundation.org> Signed-off-by: David Woodhouse <David.Woodhouse@intel.com>
143 lines
6.2 KiB
C
143 lines
6.2 KiB
C
/*
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* Definitions for RBTX4939
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*
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* (C) Copyright TOSHIBA CORPORATION 2005-2006
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* 2003-2005 (c) MontaVista Software, Inc. This file is licensed under the
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* terms of the GNU General Public License version 2. This program is
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* licensed "as is" without any warranty of any kind, whether express
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* or implied.
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*/
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#ifndef __ASM_TXX9_RBTX4939_H
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#define __ASM_TXX9_RBTX4939_H
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#include <asm/addrspace.h>
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#include <asm/txx9irq.h>
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#include <asm/txx9/generic.h>
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#include <asm/txx9/tx4939.h>
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/* Address map */
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#define RBTX4939_IOC_REG_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000)
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#define RBTX4939_BOARD_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000000)
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#define RBTX4939_IOC_REV_ADDR (IO_BASE + TXX9_CE(1) + 0x00000002)
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#define RBTX4939_CONFIG1_ADDR (IO_BASE + TXX9_CE(1) + 0x00000004)
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#define RBTX4939_CONFIG2_ADDR (IO_BASE + TXX9_CE(1) + 0x00000006)
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#define RBTX4939_CONFIG3_ADDR (IO_BASE + TXX9_CE(1) + 0x00000008)
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#define RBTX4939_CONFIG4_ADDR (IO_BASE + TXX9_CE(1) + 0x0000000a)
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#define RBTX4939_USTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00001000)
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#define RBTX4939_UDIPSW_ADDR (IO_BASE + TXX9_CE(1) + 0x00001002)
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#define RBTX4939_BDIPSW_ADDR (IO_BASE + TXX9_CE(1) + 0x00001004)
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#define RBTX4939_IEN_ADDR (IO_BASE + TXX9_CE(1) + 0x00002000)
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#define RBTX4939_IPOL_ADDR (IO_BASE + TXX9_CE(1) + 0x00002002)
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#define RBTX4939_IFAC1_ADDR (IO_BASE + TXX9_CE(1) + 0x00002004)
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#define RBTX4939_IFAC2_ADDR (IO_BASE + TXX9_CE(1) + 0x00002006)
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#define RBTX4939_SOFTINT_ADDR (IO_BASE + TXX9_CE(1) + 0x00003000)
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#define RBTX4939_ISASTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00004000)
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#define RBTX4939_PCISTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00004002)
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#define RBTX4939_ROME_ADDR (IO_BASE + TXX9_CE(1) + 0x00004004)
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#define RBTX4939_SPICS_ADDR (IO_BASE + TXX9_CE(1) + 0x00004006)
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#define RBTX4939_AUDI_ADDR (IO_BASE + TXX9_CE(1) + 0x00004008)
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#define RBTX4939_ISAGPIO_ADDR (IO_BASE + TXX9_CE(1) + 0x0000400a)
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#define RBTX4939_PE1_ADDR (IO_BASE + TXX9_CE(1) + 0x00005000)
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#define RBTX4939_PE2_ADDR (IO_BASE + TXX9_CE(1) + 0x00005002)
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#define RBTX4939_PE3_ADDR (IO_BASE + TXX9_CE(1) + 0x00005004)
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#define RBTX4939_VP_ADDR (IO_BASE + TXX9_CE(1) + 0x00005006)
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#define RBTX4939_VPRESET_ADDR (IO_BASE + TXX9_CE(1) + 0x00005008)
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#define RBTX4939_VPSOUT_ADDR (IO_BASE + TXX9_CE(1) + 0x0000500a)
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#define RBTX4939_VPSIN_ADDR (IO_BASE + TXX9_CE(1) + 0x0000500c)
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#define RBTX4939_7SEG_ADDR(s, ch) \
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(IO_BASE + TXX9_CE(1) + 0x00006000 + (s) * 16 + ((ch) & 3) * 2)
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#define RBTX4939_SOFTRESET_ADDR (IO_BASE + TXX9_CE(1) + 0x00007000)
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#define RBTX4939_RESETEN_ADDR (IO_BASE + TXX9_CE(1) + 0x00007002)
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#define RBTX4939_RESETSTAT_ADDR (IO_BASE + TXX9_CE(1) + 0x00007004)
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#define RBTX4939_ETHER_BASE (IO_BASE + TXX9_CE(1) + 0x00020000)
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/* Ethernet port address */
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#define RBTX4939_ETHER_ADDR (RBTX4939_ETHER_BASE + 0x300)
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/* bits for IEN/IPOL/IFAC */
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#define RBTX4938_INTB_ISA0 0
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#define RBTX4938_INTB_ISA11 1
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#define RBTX4938_INTB_ISA12 2
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#define RBTX4938_INTB_ISA15 3
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#define RBTX4938_INTB_I2S 4
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#define RBTX4938_INTB_SW 5
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#define RBTX4938_INTF_ISA0 (1 << RBTX4938_INTB_ISA0)
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#define RBTX4938_INTF_ISA11 (1 << RBTX4938_INTB_ISA11)
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#define RBTX4938_INTF_ISA12 (1 << RBTX4938_INTB_ISA12)
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#define RBTX4938_INTF_ISA15 (1 << RBTX4938_INTB_ISA15)
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#define RBTX4938_INTF_I2S (1 << RBTX4938_INTB_I2S)
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#define RBTX4938_INTF_SW (1 << RBTX4938_INTB_SW)
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/* bits for PE1,PE2,PE3 */
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#define RBTX4939_PE1_ATA(ch) (0x01 << (ch))
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#define RBTX4939_PE1_RMII(ch) (0x04 << (ch))
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#define RBTX4939_PE2_SIO0 0x01
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#define RBTX4939_PE2_SIO2 0x02
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#define RBTX4939_PE2_SIO3 0x04
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#define RBTX4939_PE2_CIR 0x08
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#define RBTX4939_PE2_SPI 0x10
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#define RBTX4939_PE2_GPIO 0x20
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#define RBTX4939_PE3_VP 0x01
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#define RBTX4939_PE3_VP_P 0x02
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#define RBTX4939_PE3_VP_S 0x04
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#define rbtx4939_board_rev_addr ((u8 __iomem *)RBTX4939_BOARD_REV_ADDR)
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#define rbtx4939_ioc_rev_addr ((u8 __iomem *)RBTX4939_IOC_REV_ADDR)
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#define rbtx4939_config1_addr ((u8 __iomem *)RBTX4939_CONFIG1_ADDR)
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#define rbtx4939_config2_addr ((u8 __iomem *)RBTX4939_CONFIG2_ADDR)
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#define rbtx4939_config3_addr ((u8 __iomem *)RBTX4939_CONFIG3_ADDR)
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#define rbtx4939_config4_addr ((u8 __iomem *)RBTX4939_CONFIG4_ADDR)
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#define rbtx4939_ustat_addr ((u8 __iomem *)RBTX4939_USTAT_ADDR)
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#define rbtx4939_udipsw_addr ((u8 __iomem *)RBTX4939_UDIPSW_ADDR)
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#define rbtx4939_bdipsw_addr ((u8 __iomem *)RBTX4939_BDIPSW_ADDR)
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#define rbtx4939_ien_addr ((u8 __iomem *)RBTX4939_IEN_ADDR)
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#define rbtx4939_ipol_addr ((u8 __iomem *)RBTX4939_IPOL_ADDR)
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#define rbtx4939_ifac1_addr ((u8 __iomem *)RBTX4939_IFAC1_ADDR)
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#define rbtx4939_ifac2_addr ((u8 __iomem *)RBTX4939_IFAC2_ADDR)
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#define rbtx4939_softint_addr ((u8 __iomem *)RBTX4939_SOFTINT_ADDR)
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#define rbtx4939_isastat_addr ((u8 __iomem *)RBTX4939_ISASTAT_ADDR)
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#define rbtx4939_pcistat_addr ((u8 __iomem *)RBTX4939_PCISTAT_ADDR)
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#define rbtx4939_rome_addr ((u8 __iomem *)RBTX4939_ROME_ADDR)
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#define rbtx4939_spics_addr ((u8 __iomem *)RBTX4939_SPICS_ADDR)
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#define rbtx4939_audi_addr ((u8 __iomem *)RBTX4939_AUDI_ADDR)
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#define rbtx4939_isagpio_addr ((u8 __iomem *)RBTX4939_ISAGPIO_ADDR)
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#define rbtx4939_pe1_addr ((u8 __iomem *)RBTX4939_PE1_ADDR)
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#define rbtx4939_pe2_addr ((u8 __iomem *)RBTX4939_PE2_ADDR)
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#define rbtx4939_pe3_addr ((u8 __iomem *)RBTX4939_PE3_ADDR)
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#define rbtx4939_vp_addr ((u8 __iomem *)RBTX4939_VP_ADDR)
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#define rbtx4939_vpreset_addr ((u8 __iomem *)RBTX4939_VPRESET_ADDR)
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#define rbtx4939_vpsout_addr ((u8 __iomem *)RBTX4939_VPSOUT_ADDR)
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#define rbtx4939_vpsin_addr ((u8 __iomem *)RBTX4939_VPSIN_ADDR)
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#define rbtx4939_7seg_addr(s, ch) \
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((u8 __iomem *)RBTX4939_7SEG_ADDR(s, ch))
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#define rbtx4939_softreset_addr ((u8 __iomem *)RBTX4939_SOFTRESET_ADDR)
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#define rbtx4939_reseten_addr ((u8 __iomem *)RBTX4939_RESETEN_ADDR)
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#define rbtx4939_resetstat_addr ((u8 __iomem *)RBTX4939_RESETSTAT_ADDR)
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/*
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* IRQ mappings
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*/
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#define RBTX4939_NR_IRQ_IOC 8
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#define RBTX4939_IRQ_IOC (TXX9_IRQ_BASE + TX4939_NUM_IR)
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#define RBTX4939_IRQ_END (RBTX4939_IRQ_IOC + RBTX4939_NR_IRQ_IOC)
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/* IOC (ISA, etc) */
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#define RBTX4939_IRQ_IOCINT (TXX9_IRQ_BASE + TX4939_IR_INT(0))
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/* Onboard 10M Ether */
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#define RBTX4939_IRQ_ETHER (TXX9_IRQ_BASE + TX4939_IR_INT(1))
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void rbtx4939_prom_init(void);
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void rbtx4939_irq_setup(void);
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struct mtd_partition;
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struct map_info;
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struct rbtx4939_flash_data {
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unsigned int width;
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unsigned int nr_parts;
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struct mtd_partition *parts;
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void (*map_init)(struct map_info *map);
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};
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#endif /* __ASM_TXX9_RBTX4939_H */
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