b480a4b0c8
Remove some includes of mach/hardware.h which are not needed. hardware.h will be removed completely for tegra and cns3xxx in follow on patch. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Nicolas Pitre <nicolas.pitre@linaro.org> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
107 lines
1.8 KiB
ArmAsm
107 lines
1.8 KiB
ArmAsm
/*
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* linux/arch/arm/lib/io-readsw-armv3.S
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*
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* Copyright (C) 1995-2000 Russell King
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/linkage.h>
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#include <asm/assembler.h>
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.Linsw_bad_alignment:
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adr r0, .Linsw_bad_align_msg
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mov r2, lr
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b panic
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.Linsw_bad_align_msg:
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.asciz "insw: bad buffer alignment (0x%p, lr=0x%08lX)\n"
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.align
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.Linsw_align: tst r1, #1
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bne .Linsw_bad_alignment
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ldr r3, [r0]
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strb r3, [r1], #1
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mov r3, r3, lsr #8
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strb r3, [r1], #1
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subs r2, r2, #1
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moveq pc, lr
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ENTRY(__raw_readsw)
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teq r2, #0 @ do we have to check for the zero len?
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moveq pc, lr
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tst r1, #3
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bne .Linsw_align
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.Linsw_aligned: mov ip, #0xff
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orr ip, ip, ip, lsl #8
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stmfd sp!, {r4, r5, r6, lr}
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subs r2, r2, #8
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bmi .Lno_insw_8
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.Linsw_8_lp: ldr r3, [r0]
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and r3, r3, ip
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ldr r4, [r0]
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orr r3, r3, r4, lsl #16
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ldr r4, [r0]
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and r4, r4, ip
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ldr r5, [r0]
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orr r4, r4, r5, lsl #16
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ldr r5, [r0]
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and r5, r5, ip
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ldr r6, [r0]
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orr r5, r5, r6, lsl #16
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ldr r6, [r0]
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and r6, r6, ip
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ldr lr, [r0]
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orr r6, r6, lr, lsl #16
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stmia r1!, {r3 - r6}
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subs r2, r2, #8
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bpl .Linsw_8_lp
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tst r2, #7
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ldmeqfd sp!, {r4, r5, r6, pc}
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.Lno_insw_8: tst r2, #4
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beq .Lno_insw_4
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ldr r3, [r0]
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and r3, r3, ip
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ldr r4, [r0]
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orr r3, r3, r4, lsl #16
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ldr r4, [r0]
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and r4, r4, ip
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ldr r5, [r0]
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orr r4, r4, r5, lsl #16
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stmia r1!, {r3, r4}
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.Lno_insw_4: tst r2, #2
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beq .Lno_insw_2
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ldr r3, [r0]
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and r3, r3, ip
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ldr r4, [r0]
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orr r3, r3, r4, lsl #16
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str r3, [r1], #4
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.Lno_insw_2: tst r2, #1
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ldrne r3, [r0]
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strneb r3, [r1], #1
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movne r3, r3, lsr #8
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strneb r3, [r1]
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ldmfd sp!, {r4, r5, r6, pc}
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