182 lines
3.2 KiB
ArmAsm
182 lines
3.2 KiB
ArmAsm
/*
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* linux/arch/m32r/lib/memset.S
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*
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* Copyright (C) 2001,2002 Hiroyuki Kondo, and Hirokazu Takata
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* Copyright (C) 2004 Hirokazu Takata
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*
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* void *memset(void *dst, int val, int len);
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*
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* dst: r0
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* val: r1
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* len: r2
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* ret: r0
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*
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*/
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/* $Id$ */
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#include <linux/config.h>
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.text
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.global memset
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#ifdef CONFIG_ISA_DUAL_ISSUE
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.align 4
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memset:
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mv r4, r0 || cmpz r2
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jc r14
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cmpui r2, #16
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bnc qword_align_check
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cmpui r2, #4
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bc byte_set
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word_align_check: /* len >= 4 */
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and3 r3, r4, #3
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beqz r3, word_set
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addi r3, #-4
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neg r3, r3 /* r3 = -(r3 - 4) */
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align_word:
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stb r1, @r4 || addi r4, #1
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addi r2, #-1 || addi r3, #-1
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bnez r3, align_word
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cmpui r2, #4
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bc byte_set
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word_set:
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and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */
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sll3 r3, r1, #8
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or r1, r3 || addi r4, #-4
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sll3 r3, r1, #16
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or r1, r3 || addi r2, #-4
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word_set_loop:
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st r1, @+r4 || addi r2, #-4
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bgtz r2, word_set_loop
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bnez r2, byte_set_wrap
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st r1, @+r4
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jmp r14
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qword_align_check: /* len >= 16 */
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and3 r3, r4, #15
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bnez r3, word_align_check
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qword_set:
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and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */
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sll3 r3, r1, #8
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or r1, r3 || addi r4, #-4
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sll3 r3, r1, #16
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or r1, r3 || ldi r5, #16
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qword_set_loop:
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ld r3, @(4,r4) /* cache line allocate */
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st r1, @+r4 || addi r2, #-16
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st r1, @+r4 || cmpu r2, r5
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st r1, @+r4
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st r1, @+r4
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bnc qword_set_loop || cmpz r2
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jc r14
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set_remainder:
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cmpui r2, #4
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bc byte_set_wrap1
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addi r2, #-4
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bra word_set_loop
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byte_set_wrap:
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addi r2, #4
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cmpz r2
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jc r14
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byte_set_wrap1:
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addi r4, #4
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#if defined(CONFIG_ISA_M32R2)
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byte_set:
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addi r2, #-1 || stb r1, @r4+
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bnez r2, byte_set
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#elif defined(CONFIG_ISA_M32R)
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byte_set:
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addi r2, #-1 || stb r1, @r4
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addi r4, #1
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bnez r2, byte_set
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#else
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#error unknown isa configuration
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#endif
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end_memset:
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jmp r14
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#else /* not CONFIG_ISA_DUAL_ISSUE */
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.align 4
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memset:
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mv r4, r0
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beqz r2, end_memset
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cmpui r2, #16
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bnc qword_align_check
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cmpui r2, #4
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bc byte_set
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word_align_check: /* len >= 4 */
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and3 r3, r4, #3
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beqz r3, word_set
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addi r3, #-4
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neg r3, r3 /* r3 = -(r3 - 4) */
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align_word:
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stb r1, @r4
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addi r4, #1
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addi r2, #-1
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addi r3, #-1
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bnez r3, align_word
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cmpui r2, #4
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bc byte_set
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word_set:
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and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */
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sll3 r3, r1, #8
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or r1, r3
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sll3 r3, r1, #16
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or r1, r3
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addi r2, #-4
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addi r4, #-4
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word_set_loop:
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st r1, @+r4
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addi r2, #-4
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bgtz r2, word_set_loop
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bnez r2, byte_set_wrap
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st r1, @+r4
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jmp r14
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qword_align_check: /* len >= 16 */
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and3 r3, r4, #15
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bnez r3, word_align_check
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qword_set:
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and3 r1, r1, #0x00ff /* r1: abababab <-- ??????ab */
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sll3 r3, r1, #8
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or r1, r3
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sll3 r3, r1, #16
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or r1, r3
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addi r4, #-4
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qword_set_loop:
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ld r3, @(4,r4) /* cache line allocate */
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addi r2, #-16
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st r1, @+r4
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st r1, @+r4
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cmpui r2, #16
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st r1, @+r4
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st r1, @+r4
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bnc qword_set_loop
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bnez r2, set_remainder
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jmp r14
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set_remainder:
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cmpui r2, #4
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bc byte_set_wrap1
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addi r2, #-4
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bra word_set_loop
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byte_set_wrap:
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addi r2, #4
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beqz r2, end_memset
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byte_set_wrap1:
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addi r4, #4
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byte_set:
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addi r2, #-1
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stb r1, @r4
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addi r4, #1
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bnez r2, byte_set
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end_memset:
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jmp r14
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#endif /* not CONFIG_ISA_DUAL_ISSUE */
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.end
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