990 lines
25 KiB
C
990 lines
25 KiB
C
/*****************************************************************************/
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/*
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* comemlite.c -- PCI access code for embedded CO-MEM Lite PCI controller.
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*
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* (C) Copyright 1999-2003, Greg Ungerer (gerg@snapgear.com).
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* (C) Copyright 2000, Lineo (www.lineo.com)
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*/
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/*****************************************************************************/
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#include <linux/config.h>
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/pci.h>
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#include <linux/ptrace.h>
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#include <linux/spinlock.h>
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#include <linux/interrupt.h>
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#include <linux/sched.h>
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#include <asm/coldfire.h>
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#include <asm/mcfsim.h>
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#include <asm/irq.h>
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#include <asm/anchor.h>
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#ifdef CONFIG_eLIA
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#include <asm/elia.h>
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#endif
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/*****************************************************************************/
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/*
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* Debug configuration defines. DEBUGRES sets debugging output for
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* the resource allocation phase. DEBUGPCI traces on pcibios_ function
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* calls, and DEBUGIO traces all accesses to devices on the PCI bus.
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*/
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/*#define DEBUGRES 1*/
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/*#define DEBUGPCI 1*/
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/*#define DEBUGIO 1*/
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/*****************************************************************************/
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/*
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* PCI markers for bus present and active slots.
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*/
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int pci_bus_is_present = 0;
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unsigned long pci_slotmask = 0;
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/*
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* We may or may not need to swap the bytes of PCI bus tranfers.
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* The endianess is re-roder automatically by the CO-MEM, but it
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* will get the wrong byte order for a pure data stream.
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*/
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#define pci_byteswap 0
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/*
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* Resource tracking. The CO-MEM part creates a virtual address
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* space that all the PCI devices live in - it is not in any way
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* directly mapped into the ColdFire address space. So we can
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* really assign any resources we like to devices, as long as
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* they do not clash with other PCI devices.
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*/
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unsigned int pci_iobase = PCIBIOS_MIN_IO; /* Arbitrary start address */
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unsigned int pci_membase = PCIBIOS_MIN_MEM; /* Arbitrary start address */
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#define PCI_MINIO 0x100 /* 256 byte minimum I/O */
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#define PCI_MINMEM 0x00010000 /* 64k minimum chunk */
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/*
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* The CO-MEM's shared memory segment is visible inside the PCI
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* memory address space. We need to keep track of the address that
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* this is mapped at, to setup the bus masters pointers.
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*/
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unsigned int pci_shmemaddr;
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/*****************************************************************************/
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void pci_interrupt(int irq, void *id, struct pt_regs *fp);
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/*****************************************************************************/
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/*
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* Some platforms have custom ways of reseting the PCI bus.
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*/
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void pci_resetbus(void)
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{
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#ifdef CONFIG_eLIA
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int i;
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#ifdef DEBUGPCI
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printk(KERN_DEBUG "pci_resetbus()\n");
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#endif
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*((volatile unsigned short *) (MCF_MBAR+MCFSIM_PADDR)) |= eLIA_PCIRESET;
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for (i = 0; (i < 1000); i++) {
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*((volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT)) =
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(ppdata | eLIA_PCIRESET);
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}
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*((volatile unsigned short *) (MCF_MBAR + MCFSIM_PADAT)) = ppdata;
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#endif
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}
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/*****************************************************************************/
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int pcibios_assign_resource_slot(int slot)
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{
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volatile unsigned long *rp;
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volatile unsigned char *ip;
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unsigned int idsel, addr, val, align, i;
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int bar;
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#ifdef DEBUGPCI
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printk(KERN_INFO "pcibios_assign_resource_slot(slot=%x)\n", slot);
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#endif
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rp = (volatile unsigned long *) COMEM_BASE;
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idsel = COMEM_DA_ADDR(0x1 << (slot + 16));
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/* Try to assign resource to each BAR */
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for (bar = 0; (bar < 6); bar++) {
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addr = COMEM_PCIBUS + PCI_BASE_ADDRESS_0 + (bar * 4);
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rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
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val = rp[LREG(addr)];
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#ifdef DEBUGRES
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printk(KERN_DEBUG "-----------------------------------"
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"-------------------------------------\n");
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printk(KERN_DEBUG "BAR[%d]: read=%08x ", bar, val);
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#endif
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rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
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rp[LREG(addr)] = 0xffffffff;
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rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
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val = rp[LREG(addr)];
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#ifdef DEBUGRES
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printk(KERN_DEBUG "write=%08x ", val);
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#endif
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if (val == 0) {
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#ifdef DEBUGRES
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printk(KERN_DEBUG "\n");
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#endif
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continue;
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}
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/* Determine space required by BAR */
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/* FIXME: this should go backwords from 0x80000000... */
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for (i = 0; (i < 32); i++) {
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if ((0x1 << i) & (val & 0xfffffffc))
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break;
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}
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#ifdef DEBUGRES
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printk(KERN_DEBUG "size=%08x(%d)\n", (0x1 << i), i);
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#endif
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i = 0x1 << i;
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/* Assign a resource */
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if (val & PCI_BASE_ADDRESS_SPACE_IO) {
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if (i < PCI_MINIO)
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i = PCI_MINIO;
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#ifdef DEBUGRES
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printk(KERN_DEBUG "BAR[%d]: IO size=%08x iobase=%08x\n",
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bar, i, pci_iobase);
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#endif
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if (i > 0xffff) {
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/* Invalid size?? */
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val = 0 | PCI_BASE_ADDRESS_SPACE_IO;
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#ifdef DEBUGRES
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printk(KERN_DEBUG "BAR[%d]: too big for IO??\n", bar);
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#endif
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} else {
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/* Check for un-alignment */
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if ((align = pci_iobase % i))
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pci_iobase += (i - align);
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val = pci_iobase | PCI_BASE_ADDRESS_SPACE_IO;
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pci_iobase += i;
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}
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} else {
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if (i < PCI_MINMEM)
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i = PCI_MINMEM;
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#ifdef DEBUGRES
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printk(KERN_DEBUG "BAR[%d]: MEMORY size=%08x membase=%08x\n",
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bar, i, pci_membase);
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#endif
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/* Check for un-alignment */
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if ((align = pci_membase % i))
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pci_membase += (i - align);
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val = pci_membase | PCI_BASE_ADDRESS_SPACE_MEMORY;
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pci_membase += i;
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}
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/* Write resource back into BAR register */
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rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
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rp[LREG(addr)] = val;
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#ifdef DEBUGRES
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printk(KERN_DEBUG "BAR[%d]: assigned bar=%08x\n", bar, val);
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#endif
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}
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#ifdef DEBUGRES
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printk(KERN_DEBUG "-----------------------------------"
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"-------------------------------------\n");
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#endif
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/* Assign IRQ if one is wanted... */
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ip = (volatile unsigned char *) (COMEM_BASE + COMEM_PCIBUS);
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rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
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addr = (PCI_INTERRUPT_PIN & 0xfc) + (~PCI_INTERRUPT_PIN & 0x03);
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if (ip[addr]) {
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rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
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addr = (PCI_INTERRUPT_LINE & 0xfc)+(~PCI_INTERRUPT_LINE & 0x03);
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ip[addr] = 25;
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#ifdef DEBUGRES
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printk(KERN_DEBUG "IRQ LINE=25\n");
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#endif
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}
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return(0);
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}
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/*****************************************************************************/
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int pcibios_enable_slot(int slot)
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{
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volatile unsigned long *rp;
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volatile unsigned short *wp;
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unsigned int idsel, addr;
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unsigned short cmd;
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#ifdef DEBUGPCI
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printk(KERN_DEBUG "pcibios_enbale_slot(slot=%x)\n", slot);
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#endif
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rp = (volatile unsigned long *) COMEM_BASE;
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wp = (volatile unsigned short *) COMEM_BASE;
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idsel = COMEM_DA_ADDR(0x1 << (slot + 16));
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/* Get current command settings */
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addr = COMEM_PCIBUS + PCI_COMMAND;
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addr = (addr & ~0x3) + (~addr & 0x02);
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rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGRD | idsel;
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cmd = wp[WREG(addr)];
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/*val = ((val & 0xff) << 8) | ((val >> 8) & 0xff);*/
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/* Enable I/O and memory accesses to this device */
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rp[LREG(COMEM_DAHBASE)] = COMEM_DA_CFGWR | idsel;
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cmd |= PCI_COMMAND_IO | PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER;
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wp[WREG(addr)] = cmd;
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return(0);
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}
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/*****************************************************************************/
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void pcibios_assign_resources(void)
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{
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volatile unsigned long *rp;
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unsigned long sel, id;
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int slot;
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rp = (volatile unsigned long *) COMEM_BASE;
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/*
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* Do a quick scan of the PCI bus and see what is here.
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*/
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for (slot = COMEM_MINDEV; (slot <= COMEM_MAXDEV); slot++) {
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sel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << (slot + 16));
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rp[LREG(COMEM_DAHBASE)] = sel;
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rp[LREG(COMEM_PCIBUS)] = 0; /* Clear bus */
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id = rp[LREG(COMEM_PCIBUS)];
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if ((id != 0) && ((id & 0xffff0000) != (sel & 0xffff0000))) {
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printk(KERN_INFO "PCI: slot=%d id=%08x\n", slot, (int) id);
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pci_slotmask |= 0x1 << slot;
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pcibios_assign_resource_slot(slot);
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pcibios_enable_slot(slot);
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}
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}
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}
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/*****************************************************************************/
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int pcibios_init(void)
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{
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volatile unsigned long *rp;
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unsigned long sel, id;
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int slot;
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#ifdef DEBUGPCI
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printk(KERN_DEBUG "pcibios_init()\n");
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#endif
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pci_resetbus();
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/*
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* Do some sort of basic check to see if the CO-MEM part
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* is present... This works ok, but I think we really need
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* something better...
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*/
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rp = (volatile unsigned long *) COMEM_BASE;
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if ((rp[LREG(COMEM_LBUSCFG)] & 0xff) != 0x50) {
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printk(KERN_INFO "PCI: no PCI bus present\n");
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return(0);
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}
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#ifdef COMEM_BRIDGEDEV
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/*
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* Setup the PCI bridge device first. It needs resources too,
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* so that bus masters can get to its shared memory.
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*/
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slot = COMEM_BRIDGEDEV;
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sel = COMEM_DA_CFGRD | COMEM_DA_ADDR(0x1 << (slot + 16));
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rp[LREG(COMEM_DAHBASE)] = sel;
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rp[LREG(COMEM_PCIBUS)] = 0; /* Clear bus */
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id = rp[LREG(COMEM_PCIBUS)];
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if ((id == 0) || ((id & 0xffff0000) == (sel & 0xffff0000))) {
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printk(KERN_INFO "PCI: no PCI bus bridge present\n");
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return(0);
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}
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printk(KERN_INFO "PCI: bridge device at slot=%d id=%08x\n", slot, (int) id);
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pci_slotmask |= 0x1 << slot;
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pci_shmemaddr = pci_membase;
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pcibios_assign_resource_slot(slot);
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pcibios_enable_slot(slot);
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#endif
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pci_bus_is_present = 1;
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/* Get PCI irq for local vectoring */
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if (request_irq(COMEM_IRQ, pci_interrupt, 0, "PCI bridge", NULL)) {
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printk(KERN_WARNING "PCI: failed to acquire interrupt %d\n", COMEM_IRQ);
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} else {
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mcf_autovector(COMEM_IRQ);
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}
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pcibios_assign_resources();
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return(0);
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}
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/*****************************************************************************/
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char *pcibios_setup(char *option)
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{
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/* Nothing for us to handle. */
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return(option);
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}
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/*****************************************************************************/
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void pcibios_fixup_bus(struct pci_bus *b)
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{
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}
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/*****************************************************************************/
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void pcibios_align_resource(void *data, struct resource *res, unsigned long size, unsigned long align)
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{
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}
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/*****************************************************************************/
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int pcibios_enable_device(struct pci_dev *dev, int mask)
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{
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int slot;
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slot = PCI_SLOT(dev->devfn);
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if ((dev->bus == 0) && (pci_slotmask & (1 << slot)))
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pcibios_enable_slot(slot);
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return(0);
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}
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/*****************************************************************************/
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void pcibios_update_resource(struct pci_dev *dev, struct resource *root, struct resource *r, int resource)
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{
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printk(KERN_WARNING "%s(%d): no support for changing PCI resources...\n",
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__FILE__, __LINE__);
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}
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/*****************************************************************************/
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/*
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* Local routines to interrcept the standard I/O and vector handling
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* code. Don't include this 'till now - initialization code above needs
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* access to the real code too.
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*/
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#include <asm/mcfpci.h>
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/*****************************************************************************/
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void pci_outb(unsigned char val, unsigned int addr)
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{
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volatile unsigned long *rp;
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volatile unsigned char *bp;
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#ifdef DEBUGIO
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printk(KERN_DEBUG "pci_outb(val=%02x,addr=%x)\n", val, addr);
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#endif
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rp = (volatile unsigned long *) COMEM_BASE;
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bp = (volatile unsigned char *) COMEM_BASE;
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rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr);
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addr = (addr & ~0x3) + (~addr & 0x03);
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bp[(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val;
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}
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/*****************************************************************************/
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void pci_outw(unsigned short val, unsigned int addr)
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{
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volatile unsigned long *rp;
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volatile unsigned short *sp;
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#ifdef DEBUGIO
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printk(KERN_DEBUG "pci_outw(val=%04x,addr=%x)\n", val, addr);
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#endif
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rp = (volatile unsigned long *) COMEM_BASE;
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sp = (volatile unsigned short *) COMEM_BASE;
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rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr);
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addr = (addr & ~0x3) + (~addr & 0x02);
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if (pci_byteswap)
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val = ((val & 0xff) << 8) | ((val >> 8) & 0xff);
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sp[WREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val;
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}
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/*****************************************************************************/
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void pci_outl(unsigned int val, unsigned int addr)
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{
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volatile unsigned long *rp;
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volatile unsigned int *lp;
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#ifdef DEBUGIO
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printk(KERN_DEBUG "pci_outl(val=%08x,addr=%x)\n", val, addr);
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#endif
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rp = (volatile unsigned long *) COMEM_BASE;
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lp = (volatile unsigned int *) COMEM_BASE;
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rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(addr);
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if (pci_byteswap)
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val = (val << 24) | ((val & 0x0000ff00) << 8) |
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((val & 0x00ff0000) >> 8) | (val >> 24);
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lp[LREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))] = val;
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}
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/*****************************************************************************/
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unsigned long pci_blmask[] = {
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0x000000e0,
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0x000000d0,
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0x000000b0,
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0x00000070
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};
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unsigned char pci_inb(unsigned int addr)
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{
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volatile unsigned long *rp;
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volatile unsigned char *bp;
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unsigned long r;
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unsigned char val;
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#ifdef DEBUGIO
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printk(KERN_DEBUG "pci_inb(addr=%x)\n", addr);
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#endif
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rp = (volatile unsigned long *) COMEM_BASE;
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bp = (volatile unsigned char *) COMEM_BASE;
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r = COMEM_DA_IORD | COMEM_DA_ADDR(addr) | pci_blmask[(addr & 0x3)];
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rp[LREG(COMEM_DAHBASE)] = r;
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addr = (addr & ~0x3) + (~addr & 0x3);
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val = bp[(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))];
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return(val);
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}
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/*****************************************************************************/
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unsigned long pci_bwmask[] = {
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0x000000c0,
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0x000000c0,
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0x00000030,
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0x00000030
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};
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unsigned short pci_inw(unsigned int addr)
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{
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volatile unsigned long *rp;
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volatile unsigned short *sp;
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unsigned long r;
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unsigned short val;
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#ifdef DEBUGIO
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printk(KERN_DEBUG "pci_inw(addr=%x)", addr);
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#endif
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rp = (volatile unsigned long *) COMEM_BASE;
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r = COMEM_DA_IORD | COMEM_DA_ADDR(addr) | pci_bwmask[(addr & 0x3)];
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rp[LREG(COMEM_DAHBASE)] = r;
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sp = (volatile unsigned short *) COMEM_BASE;
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addr = (addr & ~0x3) + (~addr & 0x02);
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val = sp[WREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))];
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if (pci_byteswap)
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val = ((val & 0xff) << 8) | ((val >> 8) & 0xff);
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#ifdef DEBUGIO
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printk(KERN_DEBUG "=%04x\n", val);
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#endif
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return(val);
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}
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/*****************************************************************************/
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unsigned int pci_inl(unsigned int addr)
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{
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volatile unsigned long *rp;
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volatile unsigned int *lp;
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unsigned int val;
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#ifdef DEBUGIO
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printk(KERN_DEBUG "pci_inl(addr=%x)", addr);
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|
#endif
|
|
|
|
rp = (volatile unsigned long *) COMEM_BASE;
|
|
lp = (volatile unsigned int *) COMEM_BASE;
|
|
rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(addr);
|
|
val = lp[LREG(COMEM_PCIBUS + COMEM_DA_OFFSET(addr))];
|
|
|
|
if (pci_byteswap)
|
|
val = (val << 24) | ((val & 0x0000ff00) << 8) |
|
|
((val & 0x00ff0000) >> 8) | (val >> 24);
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "=%08x\n", val);
|
|
#endif
|
|
return(val);
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
void pci_outsb(void *addr, void *buf, int len)
|
|
{
|
|
volatile unsigned long *rp;
|
|
volatile unsigned char *bp;
|
|
unsigned char *dp = (unsigned char *) buf;
|
|
unsigned int a = (unsigned int) addr;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_outsb(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
|
|
#endif
|
|
|
|
rp = (volatile unsigned long *) COMEM_BASE;
|
|
rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a);
|
|
|
|
a = (a & ~0x3) + (~a & 0x03);
|
|
bp = (volatile unsigned char *)
|
|
(COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
|
|
|
|
while (len--)
|
|
*bp = *dp++;
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
void pci_outsw(void *addr, void *buf, int len)
|
|
{
|
|
volatile unsigned long *rp;
|
|
volatile unsigned short *wp;
|
|
unsigned short w, *dp = (unsigned short *) buf;
|
|
unsigned int a = (unsigned int) addr;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_outsw(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
|
|
#endif
|
|
|
|
rp = (volatile unsigned long *) COMEM_BASE;
|
|
rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a);
|
|
|
|
a = (a & ~0x3) + (~a & 0x2);
|
|
wp = (volatile unsigned short *)
|
|
(COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
|
|
|
|
while (len--) {
|
|
w = *dp++;
|
|
if (pci_byteswap)
|
|
w = ((w & 0xff) << 8) | ((w >> 8) & 0xff);
|
|
*wp = w;
|
|
}
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
void pci_outsl(void *addr, void *buf, int len)
|
|
{
|
|
volatile unsigned long *rp;
|
|
volatile unsigned long *lp;
|
|
unsigned long l, *dp = (unsigned long *) buf;
|
|
unsigned int a = (unsigned int) addr;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_outsl(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
|
|
#endif
|
|
|
|
rp = (volatile unsigned long *) COMEM_BASE;
|
|
rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IOWR | COMEM_DA_ADDR(a);
|
|
|
|
lp = (volatile unsigned long *)
|
|
(COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
|
|
|
|
while (len--) {
|
|
l = *dp++;
|
|
if (pci_byteswap)
|
|
l = (l << 24) | ((l & 0x0000ff00) << 8) |
|
|
((l & 0x00ff0000) >> 8) | (l >> 24);
|
|
*lp = l;
|
|
}
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
void pci_insb(void *addr, void *buf, int len)
|
|
{
|
|
volatile unsigned long *rp;
|
|
volatile unsigned char *bp;
|
|
unsigned char *dp = (unsigned char *) buf;
|
|
unsigned int a = (unsigned int) addr;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_insb(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
|
|
#endif
|
|
|
|
rp = (volatile unsigned long *) COMEM_BASE;
|
|
rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a);
|
|
|
|
a = (a & ~0x3) + (~a & 0x03);
|
|
bp = (volatile unsigned char *)
|
|
(COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
|
|
|
|
while (len--)
|
|
*dp++ = *bp;
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
void pci_insw(void *addr, void *buf, int len)
|
|
{
|
|
volatile unsigned long *rp;
|
|
volatile unsigned short *wp;
|
|
unsigned short w, *dp = (unsigned short *) buf;
|
|
unsigned int a = (unsigned int) addr;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_insw(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
|
|
#endif
|
|
|
|
rp = (volatile unsigned long *) COMEM_BASE;
|
|
rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a);
|
|
|
|
a = (a & ~0x3) + (~a & 0x2);
|
|
wp = (volatile unsigned short *)
|
|
(COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
|
|
|
|
while (len--) {
|
|
w = *wp;
|
|
if (pci_byteswap)
|
|
w = ((w & 0xff) << 8) | ((w >> 8) & 0xff);
|
|
*dp++ = w;
|
|
}
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
void pci_insl(void *addr, void *buf, int len)
|
|
{
|
|
volatile unsigned long *rp;
|
|
volatile unsigned long *lp;
|
|
unsigned long l, *dp = (unsigned long *) buf;
|
|
unsigned int a = (unsigned int) addr;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_insl(addr=%x,buf=%x,len=%d)\n", (int)addr, (int)buf, len);
|
|
#endif
|
|
|
|
rp = (volatile unsigned long *) COMEM_BASE;
|
|
rp[LREG(COMEM_DAHBASE)] = COMEM_DA_IORD | COMEM_DA_ADDR(a);
|
|
|
|
lp = (volatile unsigned long *)
|
|
(COMEM_BASE + COMEM_PCIBUS + COMEM_DA_OFFSET(a));
|
|
|
|
while (len--) {
|
|
l = *lp;
|
|
if (pci_byteswap)
|
|
l = (l << 24) | ((l & 0x0000ff00) << 8) |
|
|
((l & 0x00ff0000) >> 8) | (l >> 24);
|
|
*dp++ = l;
|
|
}
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
struct pci_localirqlist {
|
|
void (*handler)(int, void *, struct pt_regs *);
|
|
const char *device;
|
|
void *dev_id;
|
|
};
|
|
|
|
struct pci_localirqlist pci_irqlist[COMEM_MAXPCI];
|
|
|
|
/*****************************************************************************/
|
|
|
|
int pci_request_irq(unsigned int irq,
|
|
void (*handler)(int, void *, struct pt_regs *),
|
|
unsigned long flags, const char *device, void *dev_id)
|
|
{
|
|
int i;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_request_irq(irq=%d,handler=%x,flags=%x,device=%s,"
|
|
"dev_id=%x)\n", irq, (int) handler, (int) flags, device,
|
|
(int) dev_id);
|
|
#endif
|
|
|
|
/* Check if this interrupt handler is already lodged */
|
|
for (i = 0; (i < COMEM_MAXPCI); i++) {
|
|
if (pci_irqlist[i].handler == handler)
|
|
return(0);
|
|
}
|
|
|
|
/* Find a free spot to put this handler */
|
|
for (i = 0; (i < COMEM_MAXPCI); i++) {
|
|
if (pci_irqlist[i].handler == 0) {
|
|
pci_irqlist[i].handler = handler;
|
|
pci_irqlist[i].device = device;
|
|
pci_irqlist[i].dev_id = dev_id;
|
|
return(0);
|
|
}
|
|
}
|
|
|
|
/* Couldn't fit?? */
|
|
return(1);
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
void pci_free_irq(unsigned int irq, void *dev_id)
|
|
{
|
|
int i;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_free_irq(irq=%d,dev_id=%x)\n", irq, (int) dev_id);
|
|
#endif
|
|
|
|
if (dev_id == (void *) NULL)
|
|
return;
|
|
|
|
/* Check if this interrupt handler is lodged */
|
|
for (i = 0; (i < COMEM_MAXPCI); i++) {
|
|
if (pci_irqlist[i].dev_id == dev_id) {
|
|
pci_irqlist[i].handler = NULL;
|
|
pci_irqlist[i].device = NULL;
|
|
pci_irqlist[i].dev_id = NULL;
|
|
break;
|
|
}
|
|
}
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
void pci_interrupt(int irq, void *id, struct pt_regs *fp)
|
|
{
|
|
int i;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_interrupt(irq=%d,id=%x,fp=%x)\n", irq, (int) id, (int) fp);
|
|
#endif
|
|
|
|
for (i = 0; (i < COMEM_MAXPCI); i++) {
|
|
if (pci_irqlist[i].handler)
|
|
(*pci_irqlist[i].handler)(irq,pci_irqlist[i].dev_id,fp);
|
|
}
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
/*
|
|
* The shared memory region is broken up into contiguous 512 byte
|
|
* regions for easy allocation... This is not an optimal solution
|
|
* but it makes allocation and freeing regions really easy.
|
|
*/
|
|
|
|
#define PCI_MEMSLOTSIZE 512
|
|
#define PCI_MEMSLOTS (COMEM_SHMEMSIZE / PCI_MEMSLOTSIZE)
|
|
|
|
char pci_shmemmap[PCI_MEMSLOTS];
|
|
|
|
|
|
void *pci_bmalloc(int size)
|
|
{
|
|
int i, j, nrslots;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_bmalloc(size=%d)\n", size);
|
|
#endif
|
|
|
|
if (size <= 0)
|
|
return((void *) NULL);
|
|
|
|
nrslots = (size - 1) / PCI_MEMSLOTSIZE;
|
|
|
|
for (i = 0; (i < (PCI_MEMSLOTS-nrslots)); i++) {
|
|
if (pci_shmemmap[i] == 0) {
|
|
for (j = i+1; (j < (i+nrslots)); j++) {
|
|
if (pci_shmemmap[j])
|
|
goto restart;
|
|
}
|
|
|
|
for (j = i; (j <= i+nrslots); j++)
|
|
pci_shmemmap[j] = 1;
|
|
break;
|
|
}
|
|
restart:
|
|
}
|
|
|
|
return((void *) (COMEM_BASE + COMEM_SHMEM + (i * PCI_MEMSLOTSIZE)));
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
void pci_bmfree(void *mp, int size)
|
|
{
|
|
int i, j, nrslots;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_bmfree(mp=%x,size=%d)\n", (int) mp, size);
|
|
#endif
|
|
|
|
nrslots = size / PCI_MEMSLOTSIZE;
|
|
i = (((unsigned long) mp) - (COMEM_BASE + COMEM_SHMEM)) /
|
|
PCI_MEMSLOTSIZE;
|
|
|
|
for (j = i; (j < (i+nrslots)); j++)
|
|
pci_shmemmap[j] = 0;
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
unsigned long pci_virt_to_bus(volatile void *address)
|
|
{
|
|
unsigned long l;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_virt_to_bus(address=%x)", (int) address);
|
|
#endif
|
|
|
|
l = ((unsigned long) address) - COMEM_BASE;
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "=%x\n", (int) (l+pci_shmemaddr));
|
|
#endif
|
|
return(l + pci_shmemaddr);
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
void *pci_bus_to_virt(unsigned long address)
|
|
{
|
|
unsigned long l;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_bus_to_virt(address=%x)", (int) address);
|
|
#endif
|
|
|
|
l = address - pci_shmemaddr;
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "=%x\n", (int) (address + COMEM_BASE));
|
|
#endif
|
|
return((void *) (address + COMEM_BASE));
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
void pci_bmcpyto(void *dst, void *src, int len)
|
|
{
|
|
unsigned long *dp, *sp, val;
|
|
unsigned char *dcp, *scp;
|
|
int i, j;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_bmcpyto(dst=%x,src=%x,len=%d)\n", (int)dst, (int)src, len);
|
|
#endif
|
|
|
|
dp = (unsigned long *) dst;
|
|
sp = (unsigned long *) src;
|
|
i = len >> 2;
|
|
|
|
#if 0
|
|
printk(KERN_INFO "DATA:");
|
|
scp = (unsigned char *) sp;
|
|
for (i = 0; (i < len); i++) {
|
|
if ((i % 16) == 0) printk(KERN_INFO "\n%04x: ", i);
|
|
printk(KERN_INFO "%02x ", *scp++);
|
|
}
|
|
printk(KERN_INFO "\n");
|
|
#endif
|
|
|
|
for (j = 0; (i >= 0); i--, j++) {
|
|
val = *sp++;
|
|
val = (val << 24) | ((val & 0x0000ff00) << 8) |
|
|
((val & 0x00ff0000) >> 8) | (val >> 24);
|
|
*dp++ = val;
|
|
}
|
|
|
|
if (len & 0x3) {
|
|
dcp = (unsigned char *) dp;
|
|
scp = ((unsigned char *) sp) + 3;
|
|
for (i = 0; (i < (len & 0x3)); i++)
|
|
*dcp++ = *scp--;
|
|
}
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
void pci_bmcpyfrom(void *dst, void *src, int len)
|
|
{
|
|
unsigned long *dp, *sp, val;
|
|
unsigned char *dcp, *scp;
|
|
int i;
|
|
|
|
#ifdef DEBUGIO
|
|
printk(KERN_DEBUG "pci_bmcpyfrom(dst=%x,src=%x,len=%d)\n",(int)dst,(int)src,len);
|
|
#endif
|
|
|
|
dp = (unsigned long *) dst;
|
|
sp = (unsigned long *) src;
|
|
i = len >> 2;
|
|
|
|
for (; (i >= 0); i--) {
|
|
val = *sp++;
|
|
val = (val << 24) | ((val & 0x0000ff00) << 8) |
|
|
((val & 0x00ff0000) >> 8) | (val >> 24);
|
|
*dp++ = val;
|
|
}
|
|
|
|
if (len & 0x3) {
|
|
dcp = ((unsigned char *) dp) + 3;
|
|
scp = (unsigned char *) sp;
|
|
for (i = 0; (i < (len & 0x3)); i++)
|
|
*dcp++ = *scp--;
|
|
}
|
|
|
|
#if 0
|
|
printk(KERN_INFO "DATA:");
|
|
dcp = (unsigned char *) dst;
|
|
for (i = 0; (i < len); i++) {
|
|
if ((i % 16) == 0) printk(KERN_INFO "\n%04x: ", i);
|
|
printk(KERN_INFO "%02x ", *dcp++);
|
|
}
|
|
printk(KERN_INFO "\n");
|
|
#endif
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
void *pci_alloc_consistent(struct pci_dev *dev, size_t size, dma_addr_t *dma_addr)
|
|
{
|
|
void *mp;
|
|
if ((mp = pci_bmalloc(size)) != NULL) {
|
|
dma_addr = mp - (COMEM_BASE + COMEM_SHMEM);
|
|
return(mp);
|
|
}
|
|
*dma_addr = (dma_addr_t) NULL;
|
|
return(NULL);
|
|
}
|
|
|
|
/*****************************************************************************/
|
|
|
|
void pci_free_consistent(struct pci_dev *dev, size_t size, void *cpu_addr, dma_addr_t dma_addr)
|
|
{
|
|
pci_bmfree(cpu_addr, size);
|
|
}
|
|
|
|
/*****************************************************************************/
|