d9d9cec028
This data is now coming from device tree so we can remove the duplicate data. Let's keep the DSS and DMA related things for now until those have been converted to device tree completely. While at it, let's also add the trailing commas to data structures so further processing with scripts will be a bit easier. Cc: Paul Walmsley <paul@pwsan.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
269 lines
6.8 KiB
C
269 lines
6.8 KiB
C
/*
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* omap_hwmod_2xxx_interconnect_data.c - common interconnect data for OMAP2xxx
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*
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* Copyright (C) 2009-2011 Nokia Corporation
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* Paul Walmsley
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* XXX handle crossbar/shared link difference for L3?
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* XXX these should be marked initdata for multi-OMAP kernels
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*/
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#include <asm/sizes.h>
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#include "omap_hwmod.h"
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#include "l3_2xxx.h"
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#include "l4_2xxx.h"
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#include "serial.h"
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#include "omap_hwmod_common_data.h"
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/*
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* Common interconnect data
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*/
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/* L3 -> L4_CORE interface */
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struct omap_hwmod_ocp_if omap2xxx_l3_main__l4_core = {
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.master = &omap2xxx_l3_main_hwmod,
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.slave = &omap2xxx_l4_core_hwmod,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* MPU -> L3 interface */
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struct omap_hwmod_ocp_if omap2xxx_mpu__l3_main = {
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.master = &omap2xxx_mpu_hwmod,
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.slave = &omap2xxx_l3_main_hwmod,
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.user = OCP_USER_MPU,
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};
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/* DSS -> l3 */
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struct omap_hwmod_ocp_if omap2xxx_dss__l3 = {
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.master = &omap2xxx_dss_core_hwmod,
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.slave = &omap2xxx_l3_main_hwmod,
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.fw = {
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.omap2 = {
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.l3_perm_bit = OMAP2_L3_CORE_FW_CONNID_DSS,
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.flags = OMAP_FIREWALL_L3,
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},
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},
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* L4_CORE -> L4_WKUP interface */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__l4_wkup = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_l4_wkup_hwmod,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* L4 CORE -> UART1 interface */
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struct omap_hwmod_ocp_if omap2_l4_core__uart1 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_uart1_hwmod,
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.clk = "uart1_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* L4 CORE -> UART2 interface */
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struct omap_hwmod_ocp_if omap2_l4_core__uart2 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_uart2_hwmod,
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.clk = "uart2_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* L4 PER -> UART3 interface */
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struct omap_hwmod_ocp_if omap2_l4_core__uart3 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_uart3_hwmod,
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.clk = "uart3_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4 core -> mcspi1 interface */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi1 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_mcspi1_hwmod,
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.clk = "mcspi1_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4 core -> mcspi2 interface */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__mcspi2 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_mcspi2_hwmod,
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.clk = "mcspi2_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> timer2 */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__timer2 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_timer2_hwmod,
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.clk = "gpt2_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> timer3 */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__timer3 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_timer3_hwmod,
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.clk = "gpt3_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> timer4 */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__timer4 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_timer4_hwmod,
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.clk = "gpt4_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> timer5 */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__timer5 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_timer5_hwmod,
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.clk = "gpt5_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> timer6 */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__timer6 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_timer6_hwmod,
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.clk = "gpt6_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> timer7 */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__timer7 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_timer7_hwmod,
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.clk = "gpt7_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> timer8 */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__timer8 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_timer8_hwmod,
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.clk = "gpt8_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> timer9 */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__timer9 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_timer9_hwmod,
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.clk = "gpt9_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> timer10 */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__timer10 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_timer10_hwmod,
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.clk = "gpt10_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> timer11 */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__timer11 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_timer11_hwmod,
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.clk = "gpt11_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> timer12 */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__timer12 = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_timer12_hwmod,
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.clk = "gpt12_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> dss */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__dss = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_dss_core_hwmod,
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.clk = "dss_ick",
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.fw = {
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.omap2 = {
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.l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
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.flags = OMAP_FIREWALL_L4,
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},
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},
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> dss_dispc */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_dispc = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_dss_dispc_hwmod,
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.clk = "dss_ick",
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.fw = {
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.omap2 = {
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.l4_fw_region = OMAP2420_L4_CORE_FW_DSS_DISPC_REGION,
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.flags = OMAP_FIREWALL_L4,
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},
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},
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> dss_rfbi */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_rfbi = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_dss_rfbi_hwmod,
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.clk = "dss_ick",
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.fw = {
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.omap2 = {
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.l4_fw_region = OMAP2420_L4_CORE_FW_DSS_CORE_REGION,
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.flags = OMAP_FIREWALL_L4,
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},
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},
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> dss_venc */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__dss_venc = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_dss_venc_hwmod,
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.clk = "dss_ick",
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.fw = {
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.omap2 = {
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.l4_fw_region = OMAP2420_L4_CORE_FW_DSS_VENC_REGION,
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.flags = OMAP_FIREWALL_L4,
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},
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},
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.flags = OCPIF_SWSUP_IDLE,
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4_core -> rng */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__rng = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_rng_hwmod,
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.clk = "rng_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4 core -> sham interface */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__sham = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_sham_hwmod,
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.clk = "sha_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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/* l4 core -> aes interface */
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struct omap_hwmod_ocp_if omap2xxx_l4_core__aes = {
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.master = &omap2xxx_l4_core_hwmod,
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.slave = &omap2xxx_aes_hwmod,
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.clk = "aes_ick",
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.user = OCP_USER_MPU | OCP_USER_SDMA,
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};
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