68d9ab394f
Patch from Ben Dooks Add support for the Samsung S3C2412 and S3C2413 range of SoCs. This patch contains the core identification, debug macros, and basic register updates to get these to build. Signed-off-by: Ben Dooks <ben-linux@fluff.org> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
196 lines
4.9 KiB
C
196 lines
4.9 KiB
C
/* linux/arch/arm/mach-s3c2410/s3c2412.c
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*
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* Copyright (c) 2006 Simtec Electronics
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* Ben Dooks <ben@simtec.co.uk>
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*
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* http://armlinux.simtec.co.uk/.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* Modifications:
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* 16-May-2003 BJD Created initial version
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* 16-Aug-2003 BJD Fixed header files and copyright, added URL
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* 05-Sep-2003 BJD Moved to kernel v2.6
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* 18-Jan-2004 BJD Added serial port configuration
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* 21-Aug-2004 BJD Added new struct s3c2410_board handler
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* 28-Sep-2004 BJD Updates for new serial port bits
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* 04-Nov-2004 BJD Updated UART configuration process
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* 10-Jan-2005 BJD Removed s3c2410_clock_tick_rate
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* 13-Aug-2005 DA Removed UART from initial I/O mappings
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*/
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#include <linux/kernel.h>
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#include <linux/types.h>
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#include <linux/interrupt.h>
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#include <linux/list.h>
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#include <linux/timer.h>
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#include <linux/init.h>
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#include <linux/sysdev.h>
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#include <linux/platform_device.h>
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#include <asm/mach/arch.h>
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#include <asm/mach/map.h>
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#include <asm/mach/irq.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/irq.h>
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#include <asm/arch/regs-clock.h>
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#include <asm/arch/regs-serial.h>
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#include <asm/arch/regs-gpio.h>
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#include <asm/arch/regs-gpioj.h>
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#include <asm/arch/regs-dsc.h>
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#include "s3c2412.h"
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#include "cpu.h"
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#include "devs.h"
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#include "clock.h"
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#include "pm.h"
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#ifndef CONFIG_CPU_S3C2412_ONLY
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void __iomem *s3c24xx_va_gpio2 = S3C24XX_VA_GPIO;
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#endif
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/* Initial IO mappings */
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static struct map_desc s3c2412_iodesc[] __initdata = {
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IODESC_ENT(CLKPWR),
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IODESC_ENT(LCD),
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IODESC_ENT(TIMER),
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IODESC_ENT(ADC),
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IODESC_ENT(WATCHDOG),
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};
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/* uart registration process */
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void __init s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no)
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{
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s3c24xx_init_uartdevs("s3c2412-uart", s3c2410_uart_resources, cfg, no);
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/* rename devices that are s3c2412/s3c2413 specific */
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s3c_device_sdi.name = "s3c2412-sdi";
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s3c_device_nand.name = "s3c2412-nand";
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}
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/* s3c2412_map_io
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*
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* register the standard cpu IO areas, and any passed in from the
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* machine specific initialisation.
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*/
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void __init s3c2412_map_io(struct map_desc *mach_desc, int mach_size)
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{
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/* move base of IO */
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s3c24xx_va_gpio2 = S3C24XX_VA_GPIO + 0x10;
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/* register our io-tables */
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iotable_init(s3c2412_iodesc, ARRAY_SIZE(s3c2412_iodesc));
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iotable_init(mach_desc, mach_size);
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}
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void __init s3c2412_init_clocks(int xtal)
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{
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unsigned long tmp;
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unsigned long fclk;
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unsigned long hclk;
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unsigned long pclk;
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/* now we've got our machine bits initialised, work out what
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* clocks we've got */
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fclk = s3c2410_get_pll(__raw_readl(S3C2410_MPLLCON), xtal*2);
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tmp = __raw_readl(S3C2410_CLKDIVN);
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/* work out clock scalings */
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hclk = fclk / ((tmp & S3C2412_CLKDIVN_HDIVN_MASK) + 1);
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hclk /= ((tmp & S3C2421_CLKDIVN_ARMDIVN) ? 2 : 1);
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pclk = hclk / ((tmp & S3C2412_CLKDIVN_PDIVN) ? 2 : 1);
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/* print brieft summary of clocks, etc */
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printk("S3C2412: core %ld.%03ld MHz, memory %ld.%03ld MHz, peripheral %ld.%03ld MHz\n",
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print_mhz(fclk), print_mhz(hclk), print_mhz(pclk));
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/* initialise the clocks here, to allow other things like the
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* console to use them
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*/
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s3c24xx_setup_clocks(xtal, fclk, hclk, pclk);
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s3c2412_baseclk_add();
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}
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/* need to register class before we actually register the device, and
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* we also need to ensure that it has been initialised before any of the
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* drivers even try to use it (even if not on an s3c2412 based system)
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* as a driver which may support both 2410 and 2440 may try and use it.
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*/
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#ifdef CONFIG_PM
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static struct sleep_save s3c2412_sleep[] = {
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SAVE_ITEM(S3C2412_DSC0),
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SAVE_ITEM(S3C2412_DSC1),
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SAVE_ITEM(S3C2413_GPJDAT),
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SAVE_ITEM(S3C2413_GPJCON),
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SAVE_ITEM(S3C2413_GPJUP),
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/* save the sleep configuration anyway, just in case these
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* get damaged during wakeup */
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SAVE_ITEM(S3C2412_GPBSLPCON),
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SAVE_ITEM(S3C2412_GPCSLPCON),
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SAVE_ITEM(S3C2412_GPDSLPCON),
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SAVE_ITEM(S3C2412_GPESLPCON),
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SAVE_ITEM(S3C2412_GPFSLPCON),
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SAVE_ITEM(S3C2412_GPGSLPCON),
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SAVE_ITEM(S3C2412_GPHSLPCON),
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SAVE_ITEM(S3C2413_GPJSLPCON),
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};
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static int s3c2412_suspend(struct sys_device *dev, pm_message_t state)
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{
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s3c2410_pm_do_save(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep));
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return 0;
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}
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static int s3c2412_resume(struct sys_device *dev)
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{
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s3c2410_pm_do_restore(s3c2412_sleep, ARRAY_SIZE(s3c2412_sleep));
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return 0;
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}
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#else
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#define s3c2412_suspend NULL
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#define s3c2412_resume NULL
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#endif
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struct sysdev_class s3c2412_sysclass = {
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set_kset_name("s3c2412-core"),
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.suspend = s3c2412_suspend,
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.resume = s3c2412_resume
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};
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static int __init s3c2412_core_init(void)
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{
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return sysdev_class_register(&s3c2412_sysclass);
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}
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core_initcall(s3c2412_core_init);
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static struct sys_device s3c2412_sysdev = {
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.cls = &s3c2412_sysclass,
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};
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int __init s3c2412_init(void)
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{
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printk("S3C2412: Initialising architecture\n");
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return sysdev_register(&s3c2412_sysdev);
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}
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