53821162fc
Resource size required mostly is 4K for all devices, whereas currently reserved space is much beyond that. This patch replaces SIZE macro's used at multiple places with SZ_4K. Reviewed-by: Stanley Miao <stanley.miao@windriver.com> Signed-off-by: Viresh Kumar <viresh.kumar@st.com> Signed-off-by: Shiraz Hashim <shiraz.hashim@st.com> Signed-off-by: Rajeev Kumar <rajeev-dlh.kumar@st.com> Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
473 lines
11 KiB
C
473 lines
11 KiB
C
/*
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* arch/arm/mach-spear3xx/spear300.c
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*
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* SPEAr300 machine source file
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*
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* Copyright (C) 2009 ST Microelectronics
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* Viresh Kumar<viresh.kumar@st.com>
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/types.h>
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#include <linux/amba/pl061.h>
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#include <linux/ptrace.h>
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#include <asm/irq.h>
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#include <plat/shirq.h>
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#include <mach/generic.h>
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#include <mach/hardware.h>
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/* pad multiplexing support */
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/* muxing registers */
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#define PAD_MUX_CONFIG_REG 0x00
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#define MODE_CONFIG_REG 0x04
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/* modes */
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#define NAND_MODE (1 << 0)
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#define NOR_MODE (1 << 1)
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#define PHOTO_FRAME_MODE (1 << 2)
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#define LEND_IP_PHONE_MODE (1 << 3)
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#define HEND_IP_PHONE_MODE (1 << 4)
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#define LEND_WIFI_PHONE_MODE (1 << 5)
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#define HEND_WIFI_PHONE_MODE (1 << 6)
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#define ATA_PABX_WI2S_MODE (1 << 7)
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#define ATA_PABX_I2S_MODE (1 << 8)
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#define CAML_LCDW_MODE (1 << 9)
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#define CAMU_LCD_MODE (1 << 10)
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#define CAMU_WLCD_MODE (1 << 11)
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#define CAML_LCD_MODE (1 << 12)
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#define ALL_MODES 0x1FFF
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struct pmx_mode nand_mode = {
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.id = NAND_MODE,
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.name = "nand mode",
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.mask = 0x00,
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};
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struct pmx_mode nor_mode = {
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.id = NOR_MODE,
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.name = "nor mode",
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.mask = 0x01,
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};
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struct pmx_mode photo_frame_mode = {
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.id = PHOTO_FRAME_MODE,
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.name = "photo frame mode",
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.mask = 0x02,
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};
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struct pmx_mode lend_ip_phone_mode = {
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.id = LEND_IP_PHONE_MODE,
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.name = "lend ip phone mode",
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.mask = 0x03,
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};
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struct pmx_mode hend_ip_phone_mode = {
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.id = HEND_IP_PHONE_MODE,
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.name = "hend ip phone mode",
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.mask = 0x04,
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};
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struct pmx_mode lend_wifi_phone_mode = {
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.id = LEND_WIFI_PHONE_MODE,
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.name = "lend wifi phone mode",
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.mask = 0x05,
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};
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struct pmx_mode hend_wifi_phone_mode = {
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.id = HEND_WIFI_PHONE_MODE,
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.name = "hend wifi phone mode",
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.mask = 0x06,
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};
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struct pmx_mode ata_pabx_wi2s_mode = {
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.id = ATA_PABX_WI2S_MODE,
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.name = "ata pabx wi2s mode",
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.mask = 0x07,
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};
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struct pmx_mode ata_pabx_i2s_mode = {
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.id = ATA_PABX_I2S_MODE,
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.name = "ata pabx i2s mode",
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.mask = 0x08,
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};
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struct pmx_mode caml_lcdw_mode = {
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.id = CAML_LCDW_MODE,
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.name = "caml lcdw mode",
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.mask = 0x0C,
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};
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struct pmx_mode camu_lcd_mode = {
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.id = CAMU_LCD_MODE,
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.name = "camu lcd mode",
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.mask = 0x0D,
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};
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struct pmx_mode camu_wlcd_mode = {
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.id = CAMU_WLCD_MODE,
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.name = "camu wlcd mode",
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.mask = 0x0E,
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};
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struct pmx_mode caml_lcd_mode = {
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.id = CAML_LCD_MODE,
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.name = "caml lcd mode",
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.mask = 0x0F,
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};
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/* devices */
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struct pmx_dev_mode pmx_fsmc_2_chips_modes[] = {
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{
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.ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
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ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
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.mask = PMX_FIRDA_MASK,
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},
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};
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struct pmx_dev pmx_fsmc_2_chips = {
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.name = "fsmc_2_chips",
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.modes = pmx_fsmc_2_chips_modes,
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.mode_count = ARRAY_SIZE(pmx_fsmc_2_chips_modes),
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.enb_on_reset = 1,
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};
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struct pmx_dev_mode pmx_fsmc_4_chips_modes[] = {
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{
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.ids = NAND_MODE | NOR_MODE | PHOTO_FRAME_MODE |
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ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE,
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.mask = PMX_FIRDA_MASK | PMX_UART0_MASK,
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},
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};
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struct pmx_dev pmx_fsmc_4_chips = {
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.name = "fsmc_4_chips",
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.modes = pmx_fsmc_4_chips_modes,
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.mode_count = ARRAY_SIZE(pmx_fsmc_4_chips_modes),
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.enb_on_reset = 1,
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};
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struct pmx_dev_mode pmx_keyboard_modes[] = {
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{
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.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
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LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
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CAML_LCDW_MODE | CAMU_LCD_MODE | CAMU_WLCD_MODE |
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CAML_LCD_MODE,
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.mask = 0x0,
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},
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};
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struct pmx_dev pmx_keyboard = {
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.name = "keyboard",
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.modes = pmx_keyboard_modes,
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.mode_count = ARRAY_SIZE(pmx_keyboard_modes),
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.enb_on_reset = 1,
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};
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struct pmx_dev_mode pmx_clcd_modes[] = {
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{
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.ids = PHOTO_FRAME_MODE,
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.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK ,
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}, {
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.ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE |
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CAMU_LCD_MODE | CAML_LCD_MODE,
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.mask = PMX_TIMER_3_4_MASK,
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},
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};
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struct pmx_dev pmx_clcd = {
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.name = "clcd",
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.modes = pmx_clcd_modes,
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.mode_count = ARRAY_SIZE(pmx_clcd_modes),
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.enb_on_reset = 1,
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};
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struct pmx_dev_mode pmx_telecom_gpio_modes[] = {
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{
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.ids = PHOTO_FRAME_MODE | CAMU_LCD_MODE | CAML_LCD_MODE,
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.mask = PMX_MII_MASK,
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}, {
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.ids = LEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE,
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.mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
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}, {
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.ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_WLCD_MODE,
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.mask = PMX_MII_MASK | PMX_TIMER_3_4_MASK,
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}, {
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.ids = HEND_IP_PHONE_MODE | HEND_WIFI_PHONE_MODE,
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.mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK,
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}, {
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.ids = ATA_PABX_WI2S_MODE,
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.mask = PMX_MII_MASK | PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK
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| PMX_UART0_MODEM_MASK,
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},
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};
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struct pmx_dev pmx_telecom_gpio = {
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.name = "telecom_gpio",
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.modes = pmx_telecom_gpio_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_gpio_modes),
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.enb_on_reset = 1,
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};
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struct pmx_dev_mode pmx_telecom_tdm_modes[] = {
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{
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.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
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HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE
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| HEND_WIFI_PHONE_MODE | ATA_PABX_WI2S_MODE
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| ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
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| CAMU_WLCD_MODE | CAML_LCD_MODE,
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.mask = PMX_UART0_MODEM_MASK | PMX_SSP_CS_MASK,
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},
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};
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struct pmx_dev pmx_telecom_tdm = {
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.name = "telecom_tdm",
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.modes = pmx_telecom_tdm_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_tdm_modes),
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.enb_on_reset = 1,
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};
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struct pmx_dev_mode pmx_telecom_spi_cs_i2c_clk_modes[] = {
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{
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.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE |
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LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE
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| ATA_PABX_WI2S_MODE | ATA_PABX_I2S_MODE |
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CAML_LCDW_MODE | CAML_LCD_MODE,
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.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK,
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},
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};
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struct pmx_dev pmx_telecom_spi_cs_i2c_clk = {
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.name = "telecom_spi_cs_i2c_clk",
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.modes = pmx_telecom_spi_cs_i2c_clk_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_spi_cs_i2c_clk_modes),
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.enb_on_reset = 1,
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};
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struct pmx_dev_mode pmx_telecom_camera_modes[] = {
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{
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.ids = CAML_LCDW_MODE | CAML_LCD_MODE,
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.mask = PMX_MII_MASK,
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}, {
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.ids = CAMU_LCD_MODE | CAMU_WLCD_MODE,
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.mask = PMX_TIMER_1_2_MASK | PMX_TIMER_3_4_MASK | PMX_MII_MASK,
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},
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};
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struct pmx_dev pmx_telecom_camera = {
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.name = "telecom_camera",
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.modes = pmx_telecom_camera_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_camera_modes),
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.enb_on_reset = 1,
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};
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struct pmx_dev_mode pmx_telecom_dac_modes[] = {
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{
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.ids = ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
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| CAMU_WLCD_MODE | CAML_LCD_MODE,
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.mask = PMX_TIMER_1_2_MASK,
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},
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};
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struct pmx_dev pmx_telecom_dac = {
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.name = "telecom_dac",
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.modes = pmx_telecom_dac_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_dac_modes),
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.enb_on_reset = 1,
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};
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struct pmx_dev_mode pmx_telecom_i2s_modes[] = {
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{
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.ids = LEND_IP_PHONE_MODE | HEND_IP_PHONE_MODE
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| LEND_WIFI_PHONE_MODE | HEND_WIFI_PHONE_MODE |
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ATA_PABX_I2S_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE
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| CAMU_WLCD_MODE | CAML_LCD_MODE,
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.mask = PMX_UART0_MODEM_MASK,
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},
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};
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struct pmx_dev pmx_telecom_i2s = {
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.name = "telecom_i2s",
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.modes = pmx_telecom_i2s_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_i2s_modes),
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.enb_on_reset = 1,
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};
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struct pmx_dev_mode pmx_telecom_boot_pins_modes[] = {
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{
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.ids = NAND_MODE | NOR_MODE,
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.mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
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PMX_TIMER_3_4_MASK,
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},
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};
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struct pmx_dev pmx_telecom_boot_pins = {
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.name = "telecom_boot_pins",
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.modes = pmx_telecom_boot_pins_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_boot_pins_modes),
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.enb_on_reset = 1,
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};
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struct pmx_dev_mode pmx_telecom_sdhci_4bit_modes[] = {
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{
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.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
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HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
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HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
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CAMU_WLCD_MODE | CAML_LCD_MODE | ATA_PABX_WI2S_MODE |
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ATA_PABX_I2S_MODE,
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.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
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PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
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PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK,
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},
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};
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struct pmx_dev pmx_telecom_sdhci_4bit = {
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.name = "telecom_sdhci_4bit",
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.modes = pmx_telecom_sdhci_4bit_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_sdhci_4bit_modes),
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.enb_on_reset = 1,
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};
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struct pmx_dev_mode pmx_telecom_sdhci_8bit_modes[] = {
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{
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.ids = PHOTO_FRAME_MODE | LEND_IP_PHONE_MODE |
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HEND_IP_PHONE_MODE | LEND_WIFI_PHONE_MODE |
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HEND_WIFI_PHONE_MODE | CAML_LCDW_MODE | CAMU_LCD_MODE |
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CAMU_WLCD_MODE | CAML_LCD_MODE,
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.mask = PMX_GPIO_PIN0_MASK | PMX_GPIO_PIN1_MASK |
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PMX_GPIO_PIN2_MASK | PMX_GPIO_PIN3_MASK |
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PMX_GPIO_PIN4_MASK | PMX_GPIO_PIN5_MASK | PMX_MII_MASK,
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},
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};
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struct pmx_dev pmx_telecom_sdhci_8bit = {
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.name = "telecom_sdhci_8bit",
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.modes = pmx_telecom_sdhci_8bit_modes,
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.mode_count = ARRAY_SIZE(pmx_telecom_sdhci_8bit_modes),
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.enb_on_reset = 1,
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};
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struct pmx_dev_mode pmx_gpio1_modes[] = {
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{
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.ids = PHOTO_FRAME_MODE,
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.mask = PMX_UART0_MODEM_MASK | PMX_TIMER_1_2_MASK |
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PMX_TIMER_3_4_MASK,
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},
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};
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struct pmx_dev pmx_gpio1 = {
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.name = "arm gpio1",
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.modes = pmx_gpio1_modes,
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.mode_count = ARRAY_SIZE(pmx_gpio1_modes),
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.enb_on_reset = 1,
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};
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/* pmx driver structure */
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struct pmx_driver pmx_driver = {
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.mode_reg = {.offset = MODE_CONFIG_REG, .mask = 0x0000000f},
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.mux_reg = {.offset = PAD_MUX_CONFIG_REG, .mask = 0x00007fff},
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};
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/* spear3xx shared irq */
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struct shirq_dev_config shirq_ras1_config[] = {
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{
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.virq = VIRQ_IT_PERS_S,
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.enb_mask = IT_PERS_S_IRQ_MASK,
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.status_mask = IT_PERS_S_IRQ_MASK,
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}, {
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.virq = VIRQ_IT_CHANGE_S,
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.enb_mask = IT_CHANGE_S_IRQ_MASK,
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.status_mask = IT_CHANGE_S_IRQ_MASK,
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}, {
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.virq = VIRQ_I2S,
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.enb_mask = I2S_IRQ_MASK,
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.status_mask = I2S_IRQ_MASK,
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}, {
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.virq = VIRQ_TDM,
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.enb_mask = TDM_IRQ_MASK,
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.status_mask = TDM_IRQ_MASK,
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}, {
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.virq = VIRQ_CAMERA_L,
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.enb_mask = CAMERA_L_IRQ_MASK,
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.status_mask = CAMERA_L_IRQ_MASK,
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}, {
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.virq = VIRQ_CAMERA_F,
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.enb_mask = CAMERA_F_IRQ_MASK,
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.status_mask = CAMERA_F_IRQ_MASK,
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}, {
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.virq = VIRQ_CAMERA_V,
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.enb_mask = CAMERA_V_IRQ_MASK,
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.status_mask = CAMERA_V_IRQ_MASK,
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}, {
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.virq = VIRQ_KEYBOARD,
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.enb_mask = KEYBOARD_IRQ_MASK,
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.status_mask = KEYBOARD_IRQ_MASK,
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}, {
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.virq = VIRQ_GPIO1,
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.enb_mask = GPIO1_IRQ_MASK,
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.status_mask = GPIO1_IRQ_MASK,
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},
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};
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struct spear_shirq shirq_ras1 = {
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.irq = IRQ_GEN_RAS_1,
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.dev_config = shirq_ras1_config,
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.dev_count = ARRAY_SIZE(shirq_ras1_config),
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.regs = {
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.enb_reg = INT_ENB_MASK_REG,
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.status_reg = INT_STS_MASK_REG,
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.status_reg_mask = SHIRQ_RAS1_MASK,
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.clear_reg = -1,
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},
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};
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/* Add spear300 specific devices here */
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/* arm gpio1 device registration */
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static struct pl061_platform_data gpio1_plat_data = {
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.gpio_base = 8,
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.irq_base = SPEAR_GPIO1_INT_BASE,
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};
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struct amba_device gpio1_device = {
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.dev = {
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.init_name = "gpio1",
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.platform_data = &gpio1_plat_data,
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},
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.res = {
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|
.start = SPEAR300_GPIO_BASE,
|
|
.end = SPEAR300_GPIO_BASE + SZ_4K - 1,
|
|
.flags = IORESOURCE_MEM,
|
|
},
|
|
.irq = {VIRQ_GPIO1, NO_IRQ},
|
|
};
|
|
|
|
/* spear300 routines */
|
|
void __init spear300_init(void)
|
|
{
|
|
int ret = 0;
|
|
|
|
/* call spear3xx family common init function */
|
|
spear3xx_init();
|
|
|
|
/* shared irq registration */
|
|
shirq_ras1.regs.base = ioremap(SPEAR300_TELECOM_BASE, SZ_4K);
|
|
if (shirq_ras1.regs.base) {
|
|
ret = spear_shirq_register(&shirq_ras1);
|
|
if (ret)
|
|
printk(KERN_ERR "Error registering Shared IRQ\n");
|
|
}
|
|
|
|
/* pmx initialization */
|
|
pmx_driver.base = ioremap(SPEAR300_SOC_CONFIG_BASE, SZ_4K);
|
|
if (pmx_driver.base) {
|
|
ret = pmx_register(&pmx_driver);
|
|
if (ret)
|
|
printk(KERN_ERR "padmux: registeration failed. err no"
|
|
": %d\n", ret);
|
|
/* Free Mapping, device selection already done */
|
|
iounmap(pmx_driver.base);
|
|
}
|
|
}
|