481 lines
13 KiB
C
481 lines
13 KiB
C
/*
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* Wireless Host Controller: Radio Control Interface (WHCI v0.95[2.3])
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* Radio Control command/event transport to the UWB stack
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*
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* Copyright (C) 2005-2006 Intel Corporation
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* Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License version
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* 2 as published by the Free Software Foundation.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
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* 02110-1301, USA.
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*
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*
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* Initialize and hook up the Radio Control interface.
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*
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* For each device probed, creates an 'struct whcrc' which contains
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* just the representation of the UWB Radio Controller, and the logic
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* for reading notifications and passing them to the UWB Core.
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*
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* So we initialize all of those, register the UWB Radio Controller
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* and setup the notification/event handle to pipe the notifications
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* to the UWB management Daemon.
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*
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* Once uwb_rc_add() is called, the UWB stack takes control, resets
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* the radio and readies the device to take commands the UWB
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* API/user-space.
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*
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* Note this driver is just a transport driver; the commands are
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* formed at the UWB stack and given to this driver who will deliver
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* them to the hw and transfer the replies/notifications back to the
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* UWB stack through the UWB daemon (UWBD).
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*/
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/dma-mapping.h>
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#include <linux/interrupt.h>
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#include <linux/workqueue.h>
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#include <linux/uwb.h>
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#include <linux/uwb/whci.h>
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#include <linux/uwb/umc.h>
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#include "uwb-internal.h"
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/**
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* Descriptor for an instance of the UWB Radio Control Driver that
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* attaches to the URC interface of the WHCI PCI card.
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*
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* Unless there is a lock specific to the 'data members', all access
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* is protected by uwb_rc->mutex.
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*/
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struct whcrc {
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struct umc_dev *umc_dev;
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struct uwb_rc *uwb_rc; /* UWB host controller */
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unsigned long area;
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void __iomem *rc_base;
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size_t rc_len;
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spinlock_t irq_lock;
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void *evt_buf, *cmd_buf;
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dma_addr_t evt_dma_buf, cmd_dma_buf;
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wait_queue_head_t cmd_wq;
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struct work_struct event_work;
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};
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/**
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* Execute an UWB RC command on WHCI/RC
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*
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* @rc: Instance of a Radio Controller that is a whcrc
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* @cmd: Buffer containing the RCCB and payload to execute
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* @cmd_size: Size of the command buffer.
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*
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* We copy the command into whcrc->cmd_buf (as it is pretty and
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* aligned`and physically contiguous) and then press the right keys in
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* the controller's URCCMD register to get it to read it. We might
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* have to wait for the cmd_sem to be open to us.
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*
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* NOTE: rc's mutex has to be locked
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*/
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static int whcrc_cmd(struct uwb_rc *uwb_rc,
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const struct uwb_rccb *cmd, size_t cmd_size)
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{
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int result = 0;
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struct whcrc *whcrc = uwb_rc->priv;
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struct device *dev = &whcrc->umc_dev->dev;
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u32 urccmd;
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if (cmd_size >= 4096)
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return -EINVAL;
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/*
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* If the URC is halted, then the hardware has reset itself.
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* Attempt to recover by restarting the device and then return
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* an error as it's likely that the current command isn't
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* valid for a newly started RC.
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*/
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if (le_readl(whcrc->rc_base + URCSTS) & URCSTS_HALTED) {
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dev_err(dev, "requesting reset of halted radio controller\n");
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uwb_rc_reset_all(uwb_rc);
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return -EIO;
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}
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result = wait_event_timeout(whcrc->cmd_wq,
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!(le_readl(whcrc->rc_base + URCCMD) & URCCMD_ACTIVE), HZ/2);
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if (result == 0) {
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dev_err(dev, "device is not ready to execute commands\n");
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return -ETIMEDOUT;
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}
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memmove(whcrc->cmd_buf, cmd, cmd_size);
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le_writeq(whcrc->cmd_dma_buf, whcrc->rc_base + URCCMDADDR);
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spin_lock(&whcrc->irq_lock);
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urccmd = le_readl(whcrc->rc_base + URCCMD);
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urccmd &= ~(URCCMD_EARV | URCCMD_SIZE_MASK);
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le_writel(urccmd | URCCMD_ACTIVE | URCCMD_IWR | cmd_size,
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whcrc->rc_base + URCCMD);
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spin_unlock(&whcrc->irq_lock);
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return 0;
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}
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static int whcrc_reset(struct uwb_rc *rc)
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{
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struct whcrc *whcrc = rc->priv;
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return umc_controller_reset(whcrc->umc_dev);
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}
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/**
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* Reset event reception mechanism and tell hw we are ready to get more
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*
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* We have read all the events in the event buffer, so we are ready to
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* reset it to the beginning.
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*
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* This is only called during initialization or after an event buffer
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* has been retired. This means we can be sure that event processing
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* is disabled and it's safe to update the URCEVTADDR register.
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*
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* There's no need to wait for the event processing to start as the
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* URC will not clear URCCMD_ACTIVE until (internal) event buffer
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* space is available.
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*/
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static
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void whcrc_enable_events(struct whcrc *whcrc)
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{
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u32 urccmd;
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le_writeq(whcrc->evt_dma_buf, whcrc->rc_base + URCEVTADDR);
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spin_lock(&whcrc->irq_lock);
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urccmd = le_readl(whcrc->rc_base + URCCMD) & ~URCCMD_ACTIVE;
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le_writel(urccmd | URCCMD_EARV, whcrc->rc_base + URCCMD);
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spin_unlock(&whcrc->irq_lock);
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}
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static void whcrc_event_work(struct work_struct *work)
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{
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struct whcrc *whcrc = container_of(work, struct whcrc, event_work);
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size_t size;
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u64 urcevtaddr;
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urcevtaddr = le_readq(whcrc->rc_base + URCEVTADDR);
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size = urcevtaddr & URCEVTADDR_OFFSET_MASK;
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uwb_rc_neh_grok(whcrc->uwb_rc, whcrc->evt_buf, size);
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whcrc_enable_events(whcrc);
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}
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/**
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* Catch interrupts?
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*
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* We ack inmediately (and expect the hw to do the right thing and
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* raise another IRQ if things have changed :)
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*/
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static
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irqreturn_t whcrc_irq_cb(int irq, void *_whcrc)
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{
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struct whcrc *whcrc = _whcrc;
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struct device *dev = &whcrc->umc_dev->dev;
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u32 urcsts;
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urcsts = le_readl(whcrc->rc_base + URCSTS);
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if (!(urcsts & URCSTS_INT_MASK))
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return IRQ_NONE;
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le_writel(urcsts & URCSTS_INT_MASK, whcrc->rc_base + URCSTS);
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if (urcsts & URCSTS_HSE) {
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dev_err(dev, "host system error -- hardware halted\n");
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/* FIXME: do something sensible here */
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goto out;
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}
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if (urcsts & URCSTS_ER)
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schedule_work(&whcrc->event_work);
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if (urcsts & URCSTS_RCI)
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wake_up_all(&whcrc->cmd_wq);
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out:
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return IRQ_HANDLED;
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}
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/**
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* Initialize a UMC RC interface: map regions, get (shared) IRQ
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*/
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static
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int whcrc_setup_rc_umc(struct whcrc *whcrc)
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{
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int result = 0;
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struct device *dev = &whcrc->umc_dev->dev;
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struct umc_dev *umc_dev = whcrc->umc_dev;
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whcrc->area = umc_dev->resource.start;
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whcrc->rc_len = umc_dev->resource.end - umc_dev->resource.start + 1;
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result = -EBUSY;
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if (request_mem_region(whcrc->area, whcrc->rc_len, KBUILD_MODNAME) == NULL) {
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dev_err(dev, "can't request URC region (%zu bytes @ 0x%lx): %d\n",
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whcrc->rc_len, whcrc->area, result);
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goto error_request_region;
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}
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whcrc->rc_base = ioremap_nocache(whcrc->area, whcrc->rc_len);
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if (whcrc->rc_base == NULL) {
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dev_err(dev, "can't ioremap registers (%zu bytes @ 0x%lx): %d\n",
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whcrc->rc_len, whcrc->area, result);
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goto error_ioremap_nocache;
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}
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result = request_irq(umc_dev->irq, whcrc_irq_cb, IRQF_SHARED,
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KBUILD_MODNAME, whcrc);
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if (result < 0) {
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dev_err(dev, "can't allocate IRQ %d: %d\n",
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umc_dev->irq, result);
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goto error_request_irq;
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}
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result = -ENOMEM;
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whcrc->cmd_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE,
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&whcrc->cmd_dma_buf, GFP_KERNEL);
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if (whcrc->cmd_buf == NULL) {
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dev_err(dev, "Can't allocate cmd transfer buffer\n");
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goto error_cmd_buffer;
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}
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whcrc->evt_buf = dma_alloc_coherent(&umc_dev->dev, PAGE_SIZE,
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&whcrc->evt_dma_buf, GFP_KERNEL);
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if (whcrc->evt_buf == NULL) {
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dev_err(dev, "Can't allocate evt transfer buffer\n");
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goto error_evt_buffer;
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}
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return 0;
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error_evt_buffer:
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dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf,
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whcrc->cmd_dma_buf);
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error_cmd_buffer:
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free_irq(umc_dev->irq, whcrc);
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error_request_irq:
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iounmap(whcrc->rc_base);
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error_ioremap_nocache:
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release_mem_region(whcrc->area, whcrc->rc_len);
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error_request_region:
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return result;
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}
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/**
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* Release RC's UMC resources
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*/
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static
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void whcrc_release_rc_umc(struct whcrc *whcrc)
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{
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struct umc_dev *umc_dev = whcrc->umc_dev;
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dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->evt_buf,
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whcrc->evt_dma_buf);
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dma_free_coherent(&umc_dev->dev, PAGE_SIZE, whcrc->cmd_buf,
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whcrc->cmd_dma_buf);
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free_irq(umc_dev->irq, whcrc);
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iounmap(whcrc->rc_base);
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release_mem_region(whcrc->area, whcrc->rc_len);
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}
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/**
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* whcrc_start_rc - start a WHCI radio controller
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* @whcrc: the radio controller to start
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*
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* Reset the UMC device, start the radio controller, enable events and
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* finally enable interrupts.
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*/
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static int whcrc_start_rc(struct uwb_rc *rc)
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{
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struct whcrc *whcrc = rc->priv;
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struct device *dev = &whcrc->umc_dev->dev;
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/* Reset the thing */
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le_writel(URCCMD_RESET, whcrc->rc_base + URCCMD);
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if (whci_wait_for(dev, whcrc->rc_base + URCCMD, URCCMD_RESET, 0,
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5000, "hardware reset") < 0)
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return -EBUSY;
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/* Set the event buffer, start the controller (enable IRQs later) */
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le_writel(0, whcrc->rc_base + URCINTR);
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le_writel(URCCMD_RS, whcrc->rc_base + URCCMD);
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if (whci_wait_for(dev, whcrc->rc_base + URCSTS, URCSTS_HALTED, 0,
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5000, "radio controller start") < 0)
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return -ETIMEDOUT;
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whcrc_enable_events(whcrc);
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le_writel(URCINTR_EN_ALL, whcrc->rc_base + URCINTR);
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return 0;
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}
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/**
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* whcrc_stop_rc - stop a WHCI radio controller
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* @whcrc: the radio controller to stop
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*
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* Disable interrupts and cancel any pending event processing work
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* before clearing the Run/Stop bit.
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*/
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static
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void whcrc_stop_rc(struct uwb_rc *rc)
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{
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struct whcrc *whcrc = rc->priv;
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struct umc_dev *umc_dev = whcrc->umc_dev;
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le_writel(0, whcrc->rc_base + URCINTR);
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cancel_work_sync(&whcrc->event_work);
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le_writel(0, whcrc->rc_base + URCCMD);
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whci_wait_for(&umc_dev->dev, whcrc->rc_base + URCSTS,
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URCSTS_HALTED, URCSTS_HALTED, 100, "radio controller stop");
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}
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static void whcrc_init(struct whcrc *whcrc)
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{
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spin_lock_init(&whcrc->irq_lock);
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init_waitqueue_head(&whcrc->cmd_wq);
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INIT_WORK(&whcrc->event_work, whcrc_event_work);
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}
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/**
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* Initialize the radio controller.
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*
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* NOTE: we setup whcrc->uwb_rc before calling uwb_rc_add(); in the
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* IRQ handler we use that to determine if the hw is ready to
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* handle events. Looks like a race condition, but it really is
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* not.
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*/
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static
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int whcrc_probe(struct umc_dev *umc_dev)
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{
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int result;
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struct uwb_rc *uwb_rc;
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struct whcrc *whcrc;
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struct device *dev = &umc_dev->dev;
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result = -ENOMEM;
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uwb_rc = uwb_rc_alloc();
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if (uwb_rc == NULL) {
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dev_err(dev, "unable to allocate RC instance\n");
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goto error_rc_alloc;
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}
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whcrc = kzalloc(sizeof(*whcrc), GFP_KERNEL);
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if (whcrc == NULL) {
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dev_err(dev, "unable to allocate WHC-RC instance\n");
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goto error_alloc;
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}
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whcrc_init(whcrc);
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whcrc->umc_dev = umc_dev;
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result = whcrc_setup_rc_umc(whcrc);
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if (result < 0) {
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dev_err(dev, "Can't setup RC UMC interface: %d\n", result);
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goto error_setup_rc_umc;
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}
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whcrc->uwb_rc = uwb_rc;
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uwb_rc->owner = THIS_MODULE;
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uwb_rc->cmd = whcrc_cmd;
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uwb_rc->reset = whcrc_reset;
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uwb_rc->start = whcrc_start_rc;
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uwb_rc->stop = whcrc_stop_rc;
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result = uwb_rc_add(uwb_rc, dev, whcrc);
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if (result < 0)
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goto error_rc_add;
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umc_set_drvdata(umc_dev, whcrc);
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return 0;
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error_rc_add:
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whcrc_release_rc_umc(whcrc);
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error_setup_rc_umc:
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kfree(whcrc);
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error_alloc:
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uwb_rc_put(uwb_rc);
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error_rc_alloc:
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return result;
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}
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/**
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* Clean up the radio control resources
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*
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* When we up the command semaphore, everybody possibly held trying to
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* execute a command should be granted entry and then they'll see the
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* host is quiescing and up it (so it will chain to the next waiter).
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* This should not happen (in any case), as we can only remove when
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* there are no handles open...
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*/
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static void whcrc_remove(struct umc_dev *umc_dev)
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{
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struct whcrc *whcrc = umc_get_drvdata(umc_dev);
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struct uwb_rc *uwb_rc = whcrc->uwb_rc;
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umc_set_drvdata(umc_dev, NULL);
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uwb_rc_rm(uwb_rc);
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whcrc_release_rc_umc(whcrc);
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kfree(whcrc);
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uwb_rc_put(uwb_rc);
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}
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static int whcrc_pre_reset(struct umc_dev *umc)
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{
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struct whcrc *whcrc = umc_get_drvdata(umc);
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struct uwb_rc *uwb_rc = whcrc->uwb_rc;
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uwb_rc_pre_reset(uwb_rc);
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return 0;
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}
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static int whcrc_post_reset(struct umc_dev *umc)
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{
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struct whcrc *whcrc = umc_get_drvdata(umc);
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struct uwb_rc *uwb_rc = whcrc->uwb_rc;
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uwb_rc_post_reset(uwb_rc);
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return 0;
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}
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/* PCI device ID's that we handle [so it gets loaded] */
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static struct pci_device_id whcrc_id_table[] = {
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{ PCI_DEVICE_CLASS(PCI_CLASS_WIRELESS_WHCI, ~0) },
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{ /* empty last entry */ }
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};
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MODULE_DEVICE_TABLE(pci, whcrc_id_table);
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static struct umc_driver whcrc_driver = {
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.name = "whc-rc",
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.cap_id = UMC_CAP_ID_WHCI_RC,
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.probe = whcrc_probe,
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.remove = whcrc_remove,
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.pre_reset = whcrc_pre_reset,
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.post_reset = whcrc_post_reset,
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};
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static int __init whcrc_driver_init(void)
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{
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return umc_driver_register(&whcrc_driver);
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}
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module_init(whcrc_driver_init);
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static void __exit whcrc_driver_exit(void)
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{
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umc_driver_unregister(&whcrc_driver);
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}
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module_exit(whcrc_driver_exit);
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MODULE_AUTHOR("Inaky Perez-Gonzalez <inaky.perez-gonzalez@intel.com>");
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MODULE_DESCRIPTION("Wireless Host Controller Radio Control Driver");
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MODULE_LICENSE("GPL");
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