41facaa4b6
Now, all registers will follow the same convension: EM28XX_R<reg_number>_<reg_name> This allows to associate a register with its value, and also with a canonical name. Also, registers that are specific to a given chip were renamed accordingly, as EM2800_foo (for 2800 only registers) or EM2880_foo (for registers that started to appear on em2880). Signed-off-by: Mauro Carvalho Chehab <mchehab@infradead.org>
89 lines
2.2 KiB
C
89 lines
2.2 KiB
C
#define EM_GPIO_0 (1 << 0)
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#define EM_GPIO_1 (1 << 1)
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#define EM_GPIO_2 (1 << 2)
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#define EM_GPIO_3 (1 << 3)
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#define EM_GPIO_4 (1 << 4)
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#define EM_GPIO_5 (1 << 5)
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#define EM_GPIO_6 (1 << 6)
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#define EM_GPIO_7 (1 << 7)
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#define EM_GPO_0 (1 << 0)
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#define EM_GPO_1 (1 << 1)
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#define EM_GPO_2 (1 << 2)
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#define EM_GPO_3 (1 << 3)
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/* em2800 registers */
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#define EM2800_R08_AUDIOSRC 0x08
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/* em28xx registers */
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/* GPIO/GPO registers */
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#define EM2880_R04_GPO 0x04 /* em2880-em2883 only */
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#define EM28XX_R08_GPIO 0x08 /* em2820 or upper */
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#define EM28XX_R06_I2C_CLK 0x06
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#define EM28XX_R0A_CHIPID 0x0a
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#define EM28XX_R0C_USBSUSP 0x0c /* */
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#define EM28XX_R0E_AUDIOSRC 0x0e
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#define EM28XX_R0F_XCLK 0x0f
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#define EM28XX_R10_VINMODE 0x10
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#define EM28XX_R11_VINCTRL 0x11
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#define EM28XX_R12_VINENABLE 0x12 /* */
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#define EM28XX_R14_GAMMA 0x14
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#define EM28XX_R15_RGAIN 0x15
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#define EM28XX_R16_GGAIN 0x16
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#define EM28XX_R17_BGAIN 0x17
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#define EM28XX_R18_ROFFSET 0x18
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#define EM28XX_R19_GOFFSET 0x19
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#define EM28XX_R1A_BOFFSET 0x1a
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#define EM28XX_R1B_OFLOW 0x1b
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#define EM28XX_R1C_HSTART 0x1c
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#define EM28XX_R1D_VSTART 0x1d
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#define EM28XX_R1E_CWIDTH 0x1e
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#define EM28XX_R1F_CHEIGHT 0x1f
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#define EM28XX_R20_YGAIN 0x20
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#define EM28XX_R21_YOFFSET 0x21
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#define EM28XX_R22_UVGAIN 0x22
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#define EM28XX_R23_UOFFSET 0x23
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#define EM28XX_R24_VOFFSET 0x24
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#define EM28XX_R25_SHARPNESS 0x25
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#define EM28XX_R26_COMPR 0x26
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#define EM28XX_R27_OUTFMT 0x27
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#define EM28XX_R28_XMIN 0x28
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#define EM28XX_R29_XMAX 0x29
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#define EM28XX_R2A_YMIN 0x2a
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#define EM28XX_R2B_YMAX 0x2b
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#define EM28XX_R30_HSCALELOW 0x30
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#define EM28XX_R31_HSCALEHIGH 0x31
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#define EM28XX_R32_VSCALELOW 0x32
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#define EM28XX_R33_VSCALEHIGH 0x33
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#define EM28XX_R40_AC97LSB 0x40
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#define EM28XX_R41_AC97MSB 0x41
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#define EM28XX_R42_AC97ADDR 0x42
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#define EM28XX_R43_AC97BUSY 0x43
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/* em202 registers */
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#define EM28XX_R02_MASTER_AC97 0x02
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#define EM28XX_R10_LINE_IN_AC97 0x10
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#define EM28XX_R14_VIDEO_AC97 0x14
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/* register settings */
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#define EM2800_AUDIO_SRC_TUNER 0x0d
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#define EM2800_AUDIO_SRC_LINE 0x0c
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#define EM28XX_AUDIO_SRC_TUNER 0xc0
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#define EM28XX_AUDIO_SRC_LINE 0x80
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/* FIXME: Need to be populated with the other chip ID's */
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enum em28xx_chip_id {
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CHIP_ID_EM2883 = 36,
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};
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