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James Hogan 32eb6e8bee MIPS: Netlogic: Fix CP0_EBASE redefinition warnings 
A couple of netlogic assembly files define CP0_EBASE to $15, the same as
CP0_PRID in mipsregs.h, and use it for accessing both CP0_PRId and
CP0_EBase registers. However commit 609cf6f229 ("MIPS: CPS: Early
debug using an ns16550-compatible UART") added a different definition of
CP0_EBASE to mipsregs.h, which included a register select of 1. This
causes harmless build warnings like the following:

  arch/mips/netlogic/common/reset.S:53:0: warning: "CP0_EBASE" redefined
  #define CP0_EBASE $15
  ^
  In file included from arch/mips/netlogic/common/reset.S:41:0:
  ./arch/mips/include/asm/mipsregs.h:63:0: note: this is the location of the previous definition
  #define CP0_EBASE $15, 1
  ^

Update the code to use the definitions from mipsregs.h for accessing
both registers.

Fixes: 609cf6f229 ("MIPS: CPS: Early debug using an ns16550-compatible UART")
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Acked-by: Jayachandran C <jchandra@broadcom.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/13183/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
 		2016-05-09 12:00:05 +02:00
..
Makefile
…
earlycons.c
…
irq.c MIPS: Netlogic: Use chip_data for irq_chip methods 2015-09-03 12:08:03 +02:00
nlm-dma.c dma-mapping: consolidate dma_{alloc,free}_{attrs,coherent} 2015-09-10 13:29:01 -07:00
reset.S MIPS: Netlogic: Fix CP0_EBASE redefinition warnings 2016-05-09 12:00:05 +02:00
smp.c genirq: Remove irq argument from irq flow handlers 2015-09-16 15:47:51 +02:00
smpboot.S MIPS: Netlogic: Fix CP0_EBASE redefinition warnings 2016-05-09 12:00:05 +02:00
time.c
…