184c1e2c4c
Implement functionallity in order to fixe ALSA bug#2058. Signed-off-by: James Courtier-Dutton <James@superbug.co.uk> Signed-off-by: Jaroslav Kysela <perex@suse.cz>
553 lines
16 KiB
C
553 lines
16 KiB
C
/*
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* Copyright (c) by Jaroslav Kysela <perex@suse.cz>
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* Creative Labs, Inc.
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* Routines for control of EMU10K1 chips
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*
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* BUGS:
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* --
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*
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* TODO:
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* --
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#include <sound/driver.h>
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#include <linux/time.h>
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#include <sound/core.h>
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#include <sound/emu10k1.h>
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#include <linux/delay.h>
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#include "p17v.h"
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unsigned int snd_emu10k1_ptr_read(struct snd_emu10k1 * emu, unsigned int reg, unsigned int chn)
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{
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unsigned long flags;
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unsigned int regptr, val;
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unsigned int mask;
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mask = emu->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
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regptr = ((reg << 16) & mask) | (chn & PTR_CHANNELNUM_MASK);
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if (reg & 0xff000000) {
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unsigned char size, offset;
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size = (reg >> 24) & 0x3f;
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offset = (reg >> 16) & 0x1f;
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mask = ((1 << size) - 1) << offset;
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spin_lock_irqsave(&emu->emu_lock, flags);
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outl(regptr, emu->port + PTR);
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val = inl(emu->port + DATA);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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return (val & mask) >> offset;
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} else {
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spin_lock_irqsave(&emu->emu_lock, flags);
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outl(regptr, emu->port + PTR);
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val = inl(emu->port + DATA);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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return val;
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}
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}
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EXPORT_SYMBOL(snd_emu10k1_ptr_read);
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void snd_emu10k1_ptr_write(struct snd_emu10k1 *emu, unsigned int reg, unsigned int chn, unsigned int data)
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{
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unsigned int regptr;
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unsigned long flags;
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unsigned int mask;
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mask = emu->audigy ? A_PTR_ADDRESS_MASK : PTR_ADDRESS_MASK;
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regptr = ((reg << 16) & mask) | (chn & PTR_CHANNELNUM_MASK);
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if (reg & 0xff000000) {
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unsigned char size, offset;
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size = (reg >> 24) & 0x3f;
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offset = (reg >> 16) & 0x1f;
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mask = ((1 << size) - 1) << offset;
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data = (data << offset) & mask;
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spin_lock_irqsave(&emu->emu_lock, flags);
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outl(regptr, emu->port + PTR);
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data |= inl(emu->port + DATA) & ~mask;
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outl(data, emu->port + DATA);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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} else {
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spin_lock_irqsave(&emu->emu_lock, flags);
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outl(regptr, emu->port + PTR);
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outl(data, emu->port + DATA);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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}
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}
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EXPORT_SYMBOL(snd_emu10k1_ptr_write);
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unsigned int snd_emu10k1_ptr20_read(struct snd_emu10k1 * emu,
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unsigned int reg,
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unsigned int chn)
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{
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unsigned long flags;
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unsigned int regptr, val;
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regptr = (reg << 16) | chn;
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spin_lock_irqsave(&emu->emu_lock, flags);
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outl(regptr, emu->port + 0x20 + PTR);
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val = inl(emu->port + 0x20 + DATA);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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return val;
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}
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void snd_emu10k1_ptr20_write(struct snd_emu10k1 *emu,
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unsigned int reg,
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unsigned int chn,
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unsigned int data)
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{
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unsigned int regptr;
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unsigned long flags;
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regptr = (reg << 16) | chn;
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spin_lock_irqsave(&emu->emu_lock, flags);
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outl(regptr, emu->port + 0x20 + PTR);
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outl(data, emu->port + 0x20 + DATA);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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}
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int snd_emu10k1_spi_write(struct snd_emu10k1 * emu,
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unsigned int data)
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{
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unsigned int reset, set;
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unsigned int reg, tmp;
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int n, result;
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if (emu->card_capabilities->ca0108_chip)
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reg = 0x3c; /* PTR20, reg 0x3c */
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else {
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/* For other chip types the SPI register
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* is currently unknown. */
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return 1;
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}
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if (data > 0xffff) /* Only 16bit values allowed */
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return 1;
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tmp = snd_emu10k1_ptr20_read(emu, reg, 0);
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reset = (tmp & ~0x3ffff) | 0x20000; /* Set xxx20000 */
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set = reset | 0x10000; /* Set xxx1xxxx */
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snd_emu10k1_ptr20_write(emu, reg, 0, reset | data);
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tmp = snd_emu10k1_ptr20_read(emu, reg, 0); /* write post */
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snd_emu10k1_ptr20_write(emu, reg, 0, set | data);
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result = 1;
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/* Wait for status bit to return to 0 */
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for (n = 0; n < 100; n++) {
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udelay(10);
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tmp = snd_emu10k1_ptr20_read(emu, reg, 0);
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if (!(tmp & 0x10000)) {
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result = 0;
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break;
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}
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}
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if (result) /* Timed out */
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return 1;
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snd_emu10k1_ptr20_write(emu, reg, 0, reset | data);
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tmp = snd_emu10k1_ptr20_read(emu, reg, 0); /* Write post */
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return 0;
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}
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/* The ADC does not support i2c read, so only write is implemented */
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int snd_emu10k1_i2c_write(struct snd_emu10k1 *emu,
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u32 reg,
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u32 value)
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{
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u32 tmp;
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int timeout = 0;
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int status;
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int retry;
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if ((reg > 0x7f) || (value > 0x1ff)) {
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snd_printk(KERN_ERR "i2c_write: invalid values.\n");
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return -EINVAL;
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}
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tmp = reg << 25 | value << 16;
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// snd_printk("I2C-write:reg=0x%x, value=0x%x\n", reg, value);
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/* Not sure what this I2C channel controls. */
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/* snd_emu10k1_ptr_write(emu, P17V_I2C_0, 0, tmp); */
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/* This controls the I2C connected to the WM8775 ADC Codec */
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snd_emu10k1_ptr20_write(emu, P17V_I2C_1, 0, tmp);
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tmp = snd_emu10k1_ptr20_read(emu, P17V_I2C_1, 0); /* write post */
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for (retry = 0; retry < 10; retry++) {
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/* Send the data to i2c */
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//tmp = snd_emu10k1_ptr_read(emu, P17V_I2C_ADDR, 0);
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//tmp = tmp & ~(I2C_A_ADC_READ|I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD_MASK);
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tmp = 0;
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tmp = tmp | (I2C_A_ADC_LAST|I2C_A_ADC_START|I2C_A_ADC_ADD);
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snd_emu10k1_ptr20_write(emu, P17V_I2C_ADDR, 0, tmp);
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/* Wait till the transaction ends */
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while (1) {
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udelay(10);
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status = snd_emu10k1_ptr20_read(emu, P17V_I2C_ADDR, 0);
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// snd_printk("I2C:status=0x%x\n", status);
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timeout++;
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if ((status & I2C_A_ADC_START) == 0)
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break;
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if (timeout > 1000) {
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snd_printk("emu10k1:I2C:timeout status=0x%x\n", status);
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break;
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}
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}
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//Read back and see if the transaction is successful
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if ((status & I2C_A_ADC_ABORT) == 0)
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break;
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}
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if (retry == 10) {
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snd_printk(KERN_ERR "Writing to ADC failed!\n");
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return -EINVAL;
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}
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return 0;
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}
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int snd_emu1010_fpga_write(struct snd_emu10k1 * emu, int reg, int value)
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{
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if (reg < 0 || reg > 0x3f)
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return 1;
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reg += 0x40; /* 0x40 upwards are registers. */
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if (value < 0 || value > 0x3f) /* 0 to 0x3f are values */
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return 1;
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outl(reg, emu->port + A_IOCFG);
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udelay(10);
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outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
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udelay(10);
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outl(value, emu->port + A_IOCFG);
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udelay(10);
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outl(value | 0x80 , emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
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return 0;
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}
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int snd_emu1010_fpga_read(struct snd_emu10k1 * emu, int reg, int *value)
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{
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if (reg < 0 || reg > 0x3f)
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return 1;
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reg += 0x40; /* 0x40 upwards are registers. */
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outl(reg, emu->port + A_IOCFG);
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udelay(10);
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outl(reg | 0x80, emu->port + A_IOCFG); /* High bit clocks the value into the fpga. */
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udelay(10);
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*value = ((inl(emu->port + A_IOCFG) >> 8) & 0x7f);
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return 0;
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}
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/* Each Destination has one and only one Source,
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* but one Source can feed any number of Destinations simultaneously.
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*/
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int snd_emu1010_fpga_link_dst_src_write(struct snd_emu10k1 * emu, int dst, int src)
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{
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snd_emu1010_fpga_write(emu, 0x00, ((dst >> 8) & 0x3f) );
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snd_emu1010_fpga_write(emu, 0x01, (dst & 0x3f) );
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snd_emu1010_fpga_write(emu, 0x02, ((src >> 8) & 0x3f) );
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snd_emu1010_fpga_write(emu, 0x03, (src & 0x3f) );
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return 0;
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}
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void snd_emu10k1_intr_enable(struct snd_emu10k1 *emu, unsigned int intrenb)
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{
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unsigned long flags;
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unsigned int enable;
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spin_lock_irqsave(&emu->emu_lock, flags);
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enable = inl(emu->port + INTE) | intrenb;
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outl(enable, emu->port + INTE);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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}
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void snd_emu10k1_intr_disable(struct snd_emu10k1 *emu, unsigned int intrenb)
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{
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unsigned long flags;
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unsigned int enable;
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spin_lock_irqsave(&emu->emu_lock, flags);
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enable = inl(emu->port + INTE) & ~intrenb;
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outl(enable, emu->port + INTE);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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}
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void snd_emu10k1_voice_intr_enable(struct snd_emu10k1 *emu, unsigned int voicenum)
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{
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unsigned long flags;
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unsigned int val;
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spin_lock_irqsave(&emu->emu_lock, flags);
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/* voice interrupt */
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if (voicenum >= 32) {
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outl(CLIEH << 16, emu->port + PTR);
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val = inl(emu->port + DATA);
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val |= 1 << (voicenum - 32);
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} else {
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outl(CLIEL << 16, emu->port + PTR);
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val = inl(emu->port + DATA);
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val |= 1 << voicenum;
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}
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outl(val, emu->port + DATA);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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}
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void snd_emu10k1_voice_intr_disable(struct snd_emu10k1 *emu, unsigned int voicenum)
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{
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unsigned long flags;
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unsigned int val;
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spin_lock_irqsave(&emu->emu_lock, flags);
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/* voice interrupt */
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if (voicenum >= 32) {
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outl(CLIEH << 16, emu->port + PTR);
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val = inl(emu->port + DATA);
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val &= ~(1 << (voicenum - 32));
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} else {
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outl(CLIEL << 16, emu->port + PTR);
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val = inl(emu->port + DATA);
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val &= ~(1 << voicenum);
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}
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outl(val, emu->port + DATA);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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}
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void snd_emu10k1_voice_intr_ack(struct snd_emu10k1 *emu, unsigned int voicenum)
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{
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unsigned long flags;
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spin_lock_irqsave(&emu->emu_lock, flags);
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/* voice interrupt */
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if (voicenum >= 32) {
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outl(CLIPH << 16, emu->port + PTR);
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voicenum = 1 << (voicenum - 32);
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} else {
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outl(CLIPL << 16, emu->port + PTR);
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voicenum = 1 << voicenum;
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}
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outl(voicenum, emu->port + DATA);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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}
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void snd_emu10k1_voice_half_loop_intr_enable(struct snd_emu10k1 *emu, unsigned int voicenum)
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{
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unsigned long flags;
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unsigned int val;
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spin_lock_irqsave(&emu->emu_lock, flags);
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/* voice interrupt */
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if (voicenum >= 32) {
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outl(HLIEH << 16, emu->port + PTR);
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val = inl(emu->port + DATA);
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val |= 1 << (voicenum - 32);
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} else {
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outl(HLIEL << 16, emu->port + PTR);
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val = inl(emu->port + DATA);
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val |= 1 << voicenum;
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}
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outl(val, emu->port + DATA);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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}
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void snd_emu10k1_voice_half_loop_intr_disable(struct snd_emu10k1 *emu, unsigned int voicenum)
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{
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unsigned long flags;
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unsigned int val;
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spin_lock_irqsave(&emu->emu_lock, flags);
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/* voice interrupt */
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if (voicenum >= 32) {
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outl(HLIEH << 16, emu->port + PTR);
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val = inl(emu->port + DATA);
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val &= ~(1 << (voicenum - 32));
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} else {
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outl(HLIEL << 16, emu->port + PTR);
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val = inl(emu->port + DATA);
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val &= ~(1 << voicenum);
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}
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outl(val, emu->port + DATA);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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}
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void snd_emu10k1_voice_half_loop_intr_ack(struct snd_emu10k1 *emu, unsigned int voicenum)
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{
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unsigned long flags;
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spin_lock_irqsave(&emu->emu_lock, flags);
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/* voice interrupt */
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if (voicenum >= 32) {
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outl(HLIPH << 16, emu->port + PTR);
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voicenum = 1 << (voicenum - 32);
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} else {
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outl(HLIPL << 16, emu->port + PTR);
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voicenum = 1 << voicenum;
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}
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outl(voicenum, emu->port + DATA);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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}
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void snd_emu10k1_voice_set_loop_stop(struct snd_emu10k1 *emu, unsigned int voicenum)
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{
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unsigned long flags;
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unsigned int sol;
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spin_lock_irqsave(&emu->emu_lock, flags);
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/* voice interrupt */
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if (voicenum >= 32) {
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outl(SOLEH << 16, emu->port + PTR);
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sol = inl(emu->port + DATA);
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sol |= 1 << (voicenum - 32);
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} else {
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outl(SOLEL << 16, emu->port + PTR);
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sol = inl(emu->port + DATA);
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sol |= 1 << voicenum;
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}
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outl(sol, emu->port + DATA);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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}
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void snd_emu10k1_voice_clear_loop_stop(struct snd_emu10k1 *emu, unsigned int voicenum)
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{
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unsigned long flags;
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unsigned int sol;
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spin_lock_irqsave(&emu->emu_lock, flags);
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/* voice interrupt */
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if (voicenum >= 32) {
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outl(SOLEH << 16, emu->port + PTR);
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sol = inl(emu->port + DATA);
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sol &= ~(1 << (voicenum - 32));
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} else {
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outl(SOLEL << 16, emu->port + PTR);
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sol = inl(emu->port + DATA);
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sol &= ~(1 << voicenum);
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}
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outl(sol, emu->port + DATA);
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spin_unlock_irqrestore(&emu->emu_lock, flags);
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}
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void snd_emu10k1_wait(struct snd_emu10k1 *emu, unsigned int wait)
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{
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volatile unsigned count;
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unsigned int newtime = 0, curtime;
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curtime = inl(emu->port + WC) >> 6;
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while (wait-- > 0) {
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count = 0;
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while (count++ < 16384) {
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newtime = inl(emu->port + WC) >> 6;
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if (newtime != curtime)
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break;
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}
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if (count >= 16384)
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break;
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curtime = newtime;
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}
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}
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unsigned short snd_emu10k1_ac97_read(struct snd_ac97 *ac97, unsigned short reg)
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{
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struct snd_emu10k1 *emu = ac97->private_data;
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unsigned long flags;
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unsigned short val;
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spin_lock_irqsave(&emu->emu_lock, flags);
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outb(reg, emu->port + AC97ADDRESS);
|
|
val = inw(emu->port + AC97DATA);
|
|
spin_unlock_irqrestore(&emu->emu_lock, flags);
|
|
return val;
|
|
}
|
|
|
|
void snd_emu10k1_ac97_write(struct snd_ac97 *ac97, unsigned short reg, unsigned short data)
|
|
{
|
|
struct snd_emu10k1 *emu = ac97->private_data;
|
|
unsigned long flags;
|
|
|
|
spin_lock_irqsave(&emu->emu_lock, flags);
|
|
outb(reg, emu->port + AC97ADDRESS);
|
|
outw(data, emu->port + AC97DATA);
|
|
spin_unlock_irqrestore(&emu->emu_lock, flags);
|
|
}
|
|
|
|
/*
|
|
* convert rate to pitch
|
|
*/
|
|
|
|
unsigned int snd_emu10k1_rate_to_pitch(unsigned int rate)
|
|
{
|
|
static u32 logMagTable[128] = {
|
|
0x00000, 0x02dfc, 0x05b9e, 0x088e6, 0x0b5d6, 0x0e26f, 0x10eb3, 0x13aa2,
|
|
0x1663f, 0x1918a, 0x1bc84, 0x1e72e, 0x2118b, 0x23b9a, 0x2655d, 0x28ed5,
|
|
0x2b803, 0x2e0e8, 0x30985, 0x331db, 0x359eb, 0x381b6, 0x3a93d, 0x3d081,
|
|
0x3f782, 0x41e42, 0x444c1, 0x46b01, 0x49101, 0x4b6c4, 0x4dc49, 0x50191,
|
|
0x5269e, 0x54b6f, 0x57006, 0x59463, 0x5b888, 0x5dc74, 0x60029, 0x623a7,
|
|
0x646ee, 0x66a00, 0x68cdd, 0x6af86, 0x6d1fa, 0x6f43c, 0x7164b, 0x73829,
|
|
0x759d4, 0x77b4f, 0x79c9a, 0x7bdb5, 0x7dea1, 0x7ff5e, 0x81fed, 0x8404e,
|
|
0x86082, 0x88089, 0x8a064, 0x8c014, 0x8df98, 0x8fef1, 0x91e20, 0x93d26,
|
|
0x95c01, 0x97ab4, 0x9993e, 0x9b79f, 0x9d5d9, 0x9f3ec, 0xa11d8, 0xa2f9d,
|
|
0xa4d3c, 0xa6ab5, 0xa8808, 0xaa537, 0xac241, 0xadf26, 0xafbe7, 0xb1885,
|
|
0xb3500, 0xb5157, 0xb6d8c, 0xb899f, 0xba58f, 0xbc15e, 0xbdd0c, 0xbf899,
|
|
0xc1404, 0xc2f50, 0xc4a7b, 0xc6587, 0xc8073, 0xc9b3f, 0xcb5ed, 0xcd07c,
|
|
0xceaec, 0xd053f, 0xd1f73, 0xd398a, 0xd5384, 0xd6d60, 0xd8720, 0xda0c3,
|
|
0xdba4a, 0xdd3b4, 0xded03, 0xe0636, 0xe1f4e, 0xe384a, 0xe512c, 0xe69f3,
|
|
0xe829f, 0xe9b31, 0xeb3a9, 0xecc08, 0xee44c, 0xefc78, 0xf148a, 0xf2c83,
|
|
0xf4463, 0xf5c2a, 0xf73da, 0xf8b71, 0xfa2f0, 0xfba57, 0xfd1a7, 0xfe8df
|
|
};
|
|
static char logSlopeTable[128] = {
|
|
0x5c, 0x5c, 0x5b, 0x5a, 0x5a, 0x59, 0x58, 0x58,
|
|
0x57, 0x56, 0x56, 0x55, 0x55, 0x54, 0x53, 0x53,
|
|
0x52, 0x52, 0x51, 0x51, 0x50, 0x50, 0x4f, 0x4f,
|
|
0x4e, 0x4d, 0x4d, 0x4d, 0x4c, 0x4c, 0x4b, 0x4b,
|
|
0x4a, 0x4a, 0x49, 0x49, 0x48, 0x48, 0x47, 0x47,
|
|
0x47, 0x46, 0x46, 0x45, 0x45, 0x45, 0x44, 0x44,
|
|
0x43, 0x43, 0x43, 0x42, 0x42, 0x42, 0x41, 0x41,
|
|
0x41, 0x40, 0x40, 0x40, 0x3f, 0x3f, 0x3f, 0x3e,
|
|
0x3e, 0x3e, 0x3d, 0x3d, 0x3d, 0x3c, 0x3c, 0x3c,
|
|
0x3b, 0x3b, 0x3b, 0x3b, 0x3a, 0x3a, 0x3a, 0x39,
|
|
0x39, 0x39, 0x39, 0x38, 0x38, 0x38, 0x38, 0x37,
|
|
0x37, 0x37, 0x37, 0x36, 0x36, 0x36, 0x36, 0x35,
|
|
0x35, 0x35, 0x35, 0x34, 0x34, 0x34, 0x34, 0x34,
|
|
0x33, 0x33, 0x33, 0x33, 0x32, 0x32, 0x32, 0x32,
|
|
0x32, 0x31, 0x31, 0x31, 0x31, 0x31, 0x30, 0x30,
|
|
0x30, 0x30, 0x30, 0x2f, 0x2f, 0x2f, 0x2f, 0x2f
|
|
};
|
|
int i;
|
|
|
|
if (rate == 0)
|
|
return 0; /* Bail out if no leading "1" */
|
|
rate *= 11185; /* Scale 48000 to 0x20002380 */
|
|
for (i = 31; i > 0; i--) {
|
|
if (rate & 0x80000000) { /* Detect leading "1" */
|
|
return (((unsigned int) (i - 15) << 20) +
|
|
logMagTable[0x7f & (rate >> 24)] +
|
|
(0x7f & (rate >> 17)) *
|
|
logSlopeTable[0x7f & (rate >> 24)]);
|
|
}
|
|
rate <<= 1;
|
|
}
|
|
|
|
return 0; /* Should never reach this point */
|
|
}
|
|
|