89039b37be
The 64bit SMP bootup is slightly different to the 32bit one. It enables the boot CPU local APIC timer before all CPUs are brought up. Some AMD C1E systems have the C1E feature flag only set in the secondary CPU. Due to the early enable of the boot CPU local APIC timer the APIC timer is registered as a fully functional device. When we detect the wreckage during the bringup of the secondary CPU, we need to force the boot CPU into broadcast mode. Check the C1E caused APIC timer disable, when the secondary APIC timer is initialized. If the boot CPU APIC timer was registered as a functional clock event device, then fix this up and utilize the CLOCK_EVT_NOTIFY_BROADCAST_FORCE mechanism to force the already registered boot CPU APIC timer into broadcast mode. Tested by force injecting the failure mode. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> |
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| .. | ||
| boot | ||
| crypto | ||
| ia32 | ||
| kernel | ||
| lib | ||
| mach-default | ||
| mach-es7000 | ||
| mach-generic | ||
| mach-visws | ||
| mach-voyager | ||
| math-emu | ||
| mm | ||
| oprofile | ||
| pci | ||
| power | ||
| vdso | ||
| video | ||
| xen | ||