linux/arch
John David Anglin e72b23dec1 parisc: Do not use an ordered store in pa_tlb_lock()
No need to use an ordered store in pa_tlb_lock() and update the comment
regarng usage of the sid register to unlocak a spinlock in
tlb_unlock0().

Signed-off-by: John David Anglin <dave.anglin@bell.net>
Signed-off-by: Helge Deller <deller@gmx.de>
Cc: <stable@vger.kernel.org> # v5.0+
2020-07-28 19:29:38 +02:00
..
alpha
arc
arm ARM: SoC fixes for v5.8 2020-07-17 15:38:22 -07:00
arm64 ARM: SoC fixes for v5.8 2020-07-17 15:38:22 -07:00
c6x This time around we have 4 lines of diff in the core framework, removing a 2020-06-10 11:42:19 -07:00
csky
h8300
hexagon
ia64
m68k
microblaze
mips Two fixes for the interrupt subsystem: 2020-07-19 11:53:08 -07:00
nds32
nios2
openrisc openrisc: fix boot oops when DEBUG_VM is enabled 2020-06-26 00:27:36 -07:00
parisc parisc: Do not use an ordered store in pa_tlb_lock() 2020-07-28 19:29:38 +02:00
powerpc powerpc/vas: Report proper error code for address translation failure 2020-07-15 23:09:55 +10:00
riscv RISC-V: Upgrade smp_mb__after_spinlock() to iorw,iorw 2020-07-17 09:28:35 -07:00
s390 - Update email addresses in MAINTAINERS file and add .mailmap entries 2020-07-10 08:39:33 -07:00
sh
sparc treewide: replace '---help---' in Kconfig files with 'help' 2020-06-14 01:57:21 +09:00
um
unicore32
x86 A pile of fixes for x86: 2020-07-19 12:16:09 -07:00
xtensa xtensa: simplify xtensa_pmu_irq_handler 2020-07-08 00:18:15 -07:00
.gitignore
Kconfig