linux/drivers/clk/ti
Grygorii Strashko 7828a927b8 clk: ti: dra7: fix parent for gmac_clkctrl
[ Upstream commit 69e3002837 ]

The parent clk for gmac clk ctrl has to be gmac_main_clk (125MHz) instead
of dpll_gmac_ck (1GHz). This is caused incorrect CPSW MDIO operation.
Hence, fix it.

Fixes: dffa9051d5 ('clk: ti: dra7: add new clkctrl data')
Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2020-02-24 08:36:29 +01:00
..
Kconfig treewide: Add SPDX license identifier - Makefile/Kconfig 2019-05-21 10:50:46 +02:00
Makefile clk: ti: dra7xx: rename existing clkctrl data as compat data 2018-10-03 15:02:27 +03:00
adpll.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
apll.c clk: ti: Don't reference clk_init_data after registration 2019-08-16 10:22:46 -07:00
autoidle.c clk: ti: check clock type before doing autoidle ops 2019-02-15 16:47:55 +02:00
clk-2xxx.c
clk-3xxx.c
clk-7xx-compat.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-7xx.c clk: ti: dra7: fix parent for gmac_clkctrl 2020-02-24 08:36:29 +01:00
clk-33xx-compat.c clk: ti: am33xx: rename existing clkctrl data as compat data 2018-10-03 15:02:26 +03:00
clk-33xx.c clk: ti: am33xx: add new clkctrl data for am33xx 2018-10-03 15:02:26 +03:00
clk-43xx-compat.c clk: ti: am43xx: rename existing clkctrl data as compat data 2018-10-03 15:02:26 +03:00
clk-43xx.c clk: ti: am43xx: add new clkctrl data for am43xx 2018-10-03 15:02:27 +03:00
clk-44xx.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clk-54xx.c clk: ti: add clkctrl data omap5 sgx 2019-08-26 08:47:07 -07:00
clk-814x.c clk: ti: dm814x: Add of_node_put() to prevent memory leak 2019-08-07 15:26:39 -07:00
clk-816x.c
clk-dra7-atl.c clk: ti: dra7-atl-clock: Remove ti_clk_add_alias call 2019-11-04 09:56:11 -08:00
clk.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
clkctrl.c clk: ti: clkctrl: Fix failed to enable error with double udelay timeout 2019-11-04 09:56:53 -08:00
clkt_dflt.c
clkt_dpll.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clkt_iclk.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
clock.h clk: ti: dra7: disable the RNG and TIMER12 clkctrl clocks on HS devices 2019-04-25 10:51:36 -07:00
clockdomain.c clk: ti: remove usage of CLK_IS_BASIC 2019-02-15 16:46:22 +02:00
composite.c clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
divider.c clk: ti: Remove unused functions 2019-06-07 11:54:48 -07:00
dpll.c Merge branches 'clk-renesas', 'clk-rockchip', 'clk-const' and 'clk-simplify' into clk-next 2019-09-19 15:31:41 -07:00
dpll3xxx.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
dpll44xx.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
fapll.c clk: Remove io.h from clk-provider.h 2019-05-15 13:21:37 -07:00
fixed-factor.c clk: Convert to using %pOFn instead of device_node.name 2018-08-30 09:50:20 -07:00
gate.c clk: ti: Remove unused functions 2019-06-07 11:54:48 -07:00
interface.c clk: ti: generalize the init sequence of clk_hw_omap clocks 2019-02-15 16:46:22 +02:00
mux.c clk: ti: Remove unused functions 2019-06-07 11:54:48 -07:00