240 lines
5.7 KiB
C
240 lines
5.7 KiB
C
/*
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* Copyright (C) 2001-2002 Deep Blue Solutions Ltd.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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* CPU support functions
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*/
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#include <linux/module.h>
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#include <linux/types.h>
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#include <linux/kernel.h>
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#include <linux/cpufreq.h>
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#include <linux/sched.h>
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#include <linux/smp.h>
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#include <linux/init.h>
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#include <linux/io.h>
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#include <linux/platform_device.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <asm/mach-types.h>
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#include <asm/hardware/icst.h>
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static void __iomem *cm_base;
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/* The cpufreq driver only use the OSC register */
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#define INTEGRATOR_HDR_OSC_OFFSET 0x08
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#define INTEGRATOR_HDR_LOCK_OFFSET 0x14
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static struct cpufreq_driver integrator_driver;
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static const struct icst_params lclk_params = {
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.ref = 24000000,
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.vco_max = ICST525_VCO_MAX_5V,
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.vco_min = ICST525_VCO_MIN,
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.vd_min = 8,
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.vd_max = 132,
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.rd_min = 24,
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.rd_max = 24,
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.s2div = icst525_s2div,
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.idx2s = icst525_idx2s,
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};
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static const struct icst_params cclk_params = {
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.ref = 24000000,
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.vco_max = ICST525_VCO_MAX_5V,
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.vco_min = ICST525_VCO_MIN,
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.vd_min = 12,
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.vd_max = 160,
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.rd_min = 24,
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.rd_max = 24,
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.s2div = icst525_s2div,
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.idx2s = icst525_idx2s,
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};
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/*
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* Validate the speed policy.
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*/
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static int integrator_verify_policy(struct cpufreq_policy *policy)
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{
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struct icst_vco vco;
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cpufreq_verify_within_cpu_limits(policy);
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vco = icst_hz_to_vco(&cclk_params, policy->max * 1000);
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policy->max = icst_hz(&cclk_params, vco) / 1000;
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vco = icst_hz_to_vco(&cclk_params, policy->min * 1000);
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policy->min = icst_hz(&cclk_params, vco) / 1000;
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cpufreq_verify_within_cpu_limits(policy);
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return 0;
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}
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static int integrator_set_target(struct cpufreq_policy *policy,
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unsigned int target_freq,
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unsigned int relation)
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{
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cpumask_t cpus_allowed;
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int cpu = policy->cpu;
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struct icst_vco vco;
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struct cpufreq_freqs freqs;
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u_int cm_osc;
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/*
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* Save this threads cpus_allowed mask.
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*/
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cpus_allowed = current->cpus_allowed;
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/*
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* Bind to the specified CPU. When this call returns,
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* we should be running on the right CPU.
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*/
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set_cpus_allowed_ptr(current, cpumask_of(cpu));
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BUG_ON(cpu != smp_processor_id());
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/* get current setting */
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cm_osc = __raw_readl(cm_base + INTEGRATOR_HDR_OSC_OFFSET);
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if (machine_is_integrator())
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vco.s = (cm_osc >> 8) & 7;
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else if (machine_is_cintegrator())
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vco.s = 1;
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vco.v = cm_osc & 255;
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vco.r = 22;
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freqs.old = icst_hz(&cclk_params, vco) / 1000;
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/* icst_hz_to_vco rounds down -- so we need the next
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* larger freq in case of CPUFREQ_RELATION_L.
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*/
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if (relation == CPUFREQ_RELATION_L)
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target_freq += 999;
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if (target_freq > policy->max)
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target_freq = policy->max;
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vco = icst_hz_to_vco(&cclk_params, target_freq * 1000);
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freqs.new = icst_hz(&cclk_params, vco) / 1000;
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if (freqs.old == freqs.new) {
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set_cpus_allowed_ptr(current, &cpus_allowed);
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return 0;
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}
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cpufreq_freq_transition_begin(policy, &freqs);
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cm_osc = __raw_readl(cm_base + INTEGRATOR_HDR_OSC_OFFSET);
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if (machine_is_integrator()) {
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cm_osc &= 0xfffff800;
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cm_osc |= vco.s << 8;
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} else if (machine_is_cintegrator()) {
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cm_osc &= 0xffffff00;
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}
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cm_osc |= vco.v;
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__raw_writel(0xa05f, cm_base + INTEGRATOR_HDR_LOCK_OFFSET);
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__raw_writel(cm_osc, cm_base + INTEGRATOR_HDR_OSC_OFFSET);
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__raw_writel(0, cm_base + INTEGRATOR_HDR_LOCK_OFFSET);
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/*
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* Restore the CPUs allowed mask.
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*/
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set_cpus_allowed_ptr(current, &cpus_allowed);
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cpufreq_freq_transition_end(policy, &freqs, 0);
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return 0;
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}
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static unsigned int integrator_get(unsigned int cpu)
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{
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cpumask_t cpus_allowed;
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unsigned int current_freq;
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u_int cm_osc;
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struct icst_vco vco;
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cpus_allowed = current->cpus_allowed;
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set_cpus_allowed_ptr(current, cpumask_of(cpu));
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BUG_ON(cpu != smp_processor_id());
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/* detect memory etc. */
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cm_osc = __raw_readl(cm_base + INTEGRATOR_HDR_OSC_OFFSET);
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if (machine_is_integrator())
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vco.s = (cm_osc >> 8) & 7;
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else
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vco.s = 1;
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vco.v = cm_osc & 255;
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vco.r = 22;
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current_freq = icst_hz(&cclk_params, vco) / 1000; /* current freq */
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set_cpus_allowed_ptr(current, &cpus_allowed);
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return current_freq;
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}
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static int integrator_cpufreq_init(struct cpufreq_policy *policy)
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{
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/* set default policy and cpuinfo */
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policy->max = policy->cpuinfo.max_freq = 160000;
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policy->min = policy->cpuinfo.min_freq = 12000;
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policy->cpuinfo.transition_latency = 1000000; /* 1 ms, assumed */
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return 0;
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}
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static struct cpufreq_driver integrator_driver = {
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.flags = CPUFREQ_NEED_INITIAL_FREQ_CHECK,
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.verify = integrator_verify_policy,
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.target = integrator_set_target,
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.get = integrator_get,
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.init = integrator_cpufreq_init,
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.name = "integrator",
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};
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static int __init integrator_cpufreq_probe(struct platform_device *pdev)
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{
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struct resource *res;
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res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
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if (!res)
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return -ENODEV;
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cm_base = devm_ioremap(&pdev->dev, res->start, resource_size(res));
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if (!cm_base)
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return -ENODEV;
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return cpufreq_register_driver(&integrator_driver);
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}
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static int __exit integrator_cpufreq_remove(struct platform_device *pdev)
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{
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return cpufreq_unregister_driver(&integrator_driver);
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}
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static const struct of_device_id integrator_cpufreq_match[] = {
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{ .compatible = "arm,core-module-integrator"},
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{ },
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};
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MODULE_DEVICE_TABLE(of, integrator_cpufreq_match);
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static struct platform_driver integrator_cpufreq_driver = {
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.driver = {
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.name = "integrator-cpufreq",
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.of_match_table = integrator_cpufreq_match,
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},
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.remove = __exit_p(integrator_cpufreq_remove),
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};
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module_platform_driver_probe(integrator_cpufreq_driver,
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integrator_cpufreq_probe);
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MODULE_AUTHOR("Russell M. King");
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MODULE_DESCRIPTION("cpufreq driver for ARM Integrator CPUs");
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MODULE_LICENSE("GPL");
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