cfd093bbb5
Changing the frequency of the USB clock must be done before the PLL is powered on (prepared). This matters when the USB clock is not setup by either boot ROM or boot loader. Reorder the function calls to adhere to the order noted in the user manual. Signed-off-by: Joachim Eastwood <manabian@gmail.com> Signed-off-by: Kishon Vijay Abraham I <kishon@ti.com>
144 lines
3.4 KiB
C
144 lines
3.4 KiB
C
/*
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* PHY driver for NXP LPC18xx/43xx internal USB OTG PHY
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*
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* Copyright (C) 2015 Joachim Eastwood <manabian@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#include <linux/clk.h>
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#include <linux/err.h>
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#include <linux/mfd/syscon.h>
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#include <linux/module.h>
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#include <linux/of.h>
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#include <linux/phy/phy.h>
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#include <linux/platform_device.h>
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#include <linux/regmap.h>
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/* USB OTG PHY register offset and bit in CREG */
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#define LPC18XX_CREG_CREG0 0x004
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#define LPC18XX_CREG_CREG0_USB0PHY BIT(5)
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struct lpc18xx_usb_otg_phy {
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struct phy *phy;
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struct clk *clk;
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struct regmap *reg;
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};
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static int lpc18xx_usb_otg_phy_init(struct phy *phy)
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{
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struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy);
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int ret;
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/* The PHY must be clocked at 480 MHz */
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ret = clk_set_rate(lpc->clk, 480000000);
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if (ret)
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return ret;
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return clk_prepare(lpc->clk);
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}
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static int lpc18xx_usb_otg_phy_exit(struct phy *phy)
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{
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struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy);
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clk_unprepare(lpc->clk);
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return 0;
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}
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static int lpc18xx_usb_otg_phy_power_on(struct phy *phy)
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{
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struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy);
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int ret;
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ret = clk_enable(lpc->clk);
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if (ret)
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return ret;
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/* The bit in CREG is cleared to enable the PHY */
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return regmap_update_bits(lpc->reg, LPC18XX_CREG_CREG0,
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LPC18XX_CREG_CREG0_USB0PHY, 0);
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}
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static int lpc18xx_usb_otg_phy_power_off(struct phy *phy)
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{
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struct lpc18xx_usb_otg_phy *lpc = phy_get_drvdata(phy);
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int ret;
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ret = regmap_update_bits(lpc->reg, LPC18XX_CREG_CREG0,
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LPC18XX_CREG_CREG0_USB0PHY,
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LPC18XX_CREG_CREG0_USB0PHY);
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if (ret)
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return ret;
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clk_disable(lpc->clk);
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return 0;
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}
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static const struct phy_ops lpc18xx_usb_otg_phy_ops = {
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.init = lpc18xx_usb_otg_phy_init,
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.exit = lpc18xx_usb_otg_phy_exit,
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.power_on = lpc18xx_usb_otg_phy_power_on,
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.power_off = lpc18xx_usb_otg_phy_power_off,
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.owner = THIS_MODULE,
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};
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static int lpc18xx_usb_otg_phy_probe(struct platform_device *pdev)
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{
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struct phy_provider *phy_provider;
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struct lpc18xx_usb_otg_phy *lpc;
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lpc = devm_kzalloc(&pdev->dev, sizeof(*lpc), GFP_KERNEL);
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if (!lpc)
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return -ENOMEM;
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lpc->reg = syscon_node_to_regmap(pdev->dev.of_node->parent);
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if (IS_ERR(lpc->reg)) {
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dev_err(&pdev->dev, "failed to get syscon\n");
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return PTR_ERR(lpc->reg);
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}
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lpc->clk = devm_clk_get(&pdev->dev, NULL);
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if (IS_ERR(lpc->clk)) {
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dev_err(&pdev->dev, "failed to get clock\n");
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return PTR_ERR(lpc->clk);
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}
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lpc->phy = devm_phy_create(&pdev->dev, NULL, &lpc18xx_usb_otg_phy_ops);
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if (IS_ERR(lpc->phy)) {
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dev_err(&pdev->dev, "failed to create PHY\n");
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return PTR_ERR(lpc->phy);
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}
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phy_set_drvdata(lpc->phy, lpc);
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phy_provider = devm_of_phy_provider_register(&pdev->dev,
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of_phy_simple_xlate);
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return PTR_ERR_OR_ZERO(phy_provider);
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}
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static const struct of_device_id lpc18xx_usb_otg_phy_match[] = {
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{ .compatible = "nxp,lpc1850-usb-otg-phy" },
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{ }
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};
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MODULE_DEVICE_TABLE(of, lpc18xx_usb_otg_phy_match);
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static struct platform_driver lpc18xx_usb_otg_phy_driver = {
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.probe = lpc18xx_usb_otg_phy_probe,
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.driver = {
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.name = "lpc18xx-usb-otg-phy",
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.of_match_table = lpc18xx_usb_otg_phy_match,
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},
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};
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module_platform_driver(lpc18xx_usb_otg_phy_driver);
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MODULE_AUTHOR("Joachim Eastwood <manabian@gmail.com>");
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MODULE_DESCRIPTION("NXP LPC18xx/43xx USB OTG PHY driver");
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MODULE_LICENSE("GPL v2");
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