65ebcc1158
The STiH415 is the next generation of HD, AVC set-top box processors for satellite, cable, terrestrial and IP-STB markets. It is an ARM Cortex-A9 1.0 GHz, dual-core CPU. Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> CC: Stephen Gallimore <stephen.gallimore@st.com> CC: Stuart Menefy <stuart.menefy@st.com> CC: Arnd Bergmann <arnd@arndb.de> CC: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@st.com> Signed-off-by: Olof Johansson <olof@lixom.net>
269 lines
5.5 KiB
Plaintext
269 lines
5.5 KiB
Plaintext
/*
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* Copyright (C) 2013 STMicroelectronics (R&D) Limited.
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* Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* publishhed by the Free Software Foundation.
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*/
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#include "st-pincfg.h"
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/ {
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aliases {
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gpio0 = &PIO0;
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gpio1 = &PIO1;
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gpio2 = &PIO2;
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gpio3 = &PIO3;
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gpio4 = &PIO4;
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gpio5 = &PIO5;
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gpio6 = &PIO6;
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gpio7 = &PIO7;
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gpio8 = &PIO8;
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gpio9 = &PIO9;
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gpio10 = &PIO10;
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gpio11 = &PIO11;
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gpio12 = &PIO12;
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gpio13 = &PIO13;
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gpio14 = &PIO14;
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gpio15 = &PIO15;
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gpio16 = &PIO16;
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gpio17 = &PIO17;
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gpio18 = &PIO18;
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gpio19 = &PIO100;
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gpio20 = &PIO101;
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gpio21 = &PIO102;
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gpio22 = &PIO103;
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gpio23 = &PIO104;
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gpio24 = &PIO105;
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gpio25 = &PIO106;
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gpio26 = &PIO107;
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};
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soc {
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pin-controller-sbc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stih415-sbc-pinctrl";
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st,syscfg = <&syscfg_sbc>;
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ranges = <0 0xfe610000 0x5000>;
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PIO0: gpio@fe610000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0 0x100>;
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st,bank-name = "PIO0";
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};
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PIO1: gpio@fe611000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x1000 0x100>;
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st,bank-name = "PIO1";
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};
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PIO2: gpio@fe612000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x2000 0x100>;
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st,bank-name = "PIO2";
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};
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PIO3: gpio@fe613000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x3000 0x100>;
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st,bank-name = "PIO3";
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};
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PIO4: gpio@fe614000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x4000 0x100>;
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st,bank-name = "PIO4";
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};
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sbc_serial1 {
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pinctrl_sbc_serial1:sbc_serial1 {
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st,pins {
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tx = <&PIO2 6 ALT3 OUT>;
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rx = <&PIO2 7 ALT3 IN>;
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};
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};
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};
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};
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pin-controller-front {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stih415-front-pinctrl";
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st,syscfg = <&syscfg_front>;
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ranges = <0 0xfee00000 0x8000>;
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PIO5: gpio@fee00000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0 0x100>;
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st,bank-name = "PIO5";
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};
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PIO6: gpio@fee01000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x1000 0x100>;
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st,bank-name = "PIO6";
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};
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PIO7: gpio@fee02000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x2000 0x100>;
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st,bank-name = "PIO7";
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};
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PIO8: gpio@fee03000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x3000 0x100>;
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st,bank-name = "PIO8";
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};
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PIO9: gpio@fee04000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x4000 0x100>;
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st,bank-name = "PIO9";
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};
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PIO10: gpio@fee05000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x5000 0x100>;
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st,bank-name = "PIO10";
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};
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PIO11: gpio@fee06000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x6000 0x100>;
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st,bank-name = "PIO11";
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};
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PIO12: gpio@fee07000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x7000 0x100>;
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st,bank-name = "PIO12";
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};
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};
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pin-controller-rear {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stih415-rear-pinctrl";
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st,syscfg = <&syscfg_rear>;
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ranges = <0 0xfe820000 0x8000>;
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PIO13: gpio@fe820000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0 0x100>;
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st,bank-name = "PIO13";
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};
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PIO14: gpio@fe821000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x1000 0x100>;
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st,bank-name = "PIO14";
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};
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PIO15: gpio@fe822000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x2000 0x100>;
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st,bank-name = "PIO15";
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};
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PIO16: gpio@fe823000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x3000 0x100>;
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st,bank-name = "PIO16";
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};
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PIO17: gpio@fe824000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x4000 0x100>;
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st,bank-name = "PIO17";
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};
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PIO18: gpio@fe825000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x5000 0x100>;
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st,bank-name = "PIO18";
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};
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serial2 {
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pinctrl_serial2: serial2-0 {
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st,pins {
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tx = <&PIO17 4 ALT2 OUT>;
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rx = <&PIO17 5 ALT2 IN>;
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};
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};
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};
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};
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pin-controller-left {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stih415-left-pinctrl";
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st,syscfg = <&syscfg_left>;
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ranges = <0 0xfd6b0000 0x3000>;
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PIO100: gpio@fd6b0000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0 0x100>;
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st,bank-name = "PIO100";
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};
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PIO101: gpio@fd6b1000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x1000 0x100>;
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st,bank-name = "PIO101";
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};
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PIO102: gpio@fd6b2000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x2000 0x100>;
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st,bank-name = "PIO102";
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};
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};
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pin-controller-right {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "st,stih415-right-pinctrl";
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st,syscfg = <&syscfg_right>;
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ranges = <0 0xfd330000 0x5000>;
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PIO103: gpio@fd330000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0 0x100>;
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st,bank-name = "PIO103";
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};
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PIO104: gpio@fd331000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x1000 0x100>;
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st,bank-name = "PIO104";
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};
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PIO105: gpio@fd332000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x2000 0x100>;
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st,bank-name = "PIO105";
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};
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PIO106: gpio@fd333000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x3000 0x100>;
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st,bank-name = "PIO106";
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};
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PIO107: gpio@fd334000 {
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gpio-controller;
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#gpio-cells = <1>;
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reg = <0x4000 0x100>;
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st,bank-name = "PIO107";
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};
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};
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};
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};
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