linux/drivers/perf
Will Deacon a3287c41ff drivers/perf: arm_pmu: Request PMU SPIs with IRQF_PER_CPU
Since the PMU register interface is banked per CPU, CPU PMU interrrupts
cannot be handled by a CPU other than the one with the PMU asserting the
interrupt. This means that migrating PMU SPIs, as we do during a CPU
hotplug operation doesn't make any sense and can lead to the IRQ being
disabled entirely if we route a spurious IRQ to the new affinity target.

This has been observed in practice on AMD Seattle, where CPUs on the
non-boot cluster appear to take a spurious PMU IRQ when coming online,
which is routed to CPU0 where it cannot be handled.

This patch passes IRQF_PERCPU for PMU SPIs and forcefully sets their
affinity prior to requesting them, ensuring that they cannot
be migrated during hotplug events. This interacts badly with the DB8500
erratum workaround that ping-pongs the interrupt affinity from the handler,
so we avoid passing IRQF_PERCPU in that case by allowing the IRQ flags
to be overridden in the platdata.

Fixes: 3cf7ee98b8 ("drivers/perf: arm_pmu: move irq request/free into probe")
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Will Deacon <will.deacon@arm.com>
2017-07-27 13:43:22 +01:00
..
Kconfig drivers/perf: commonise PERF_EVENTS dependency 2017-06-15 11:10:33 +01:00
Makefile drivers/perf: arm_pmu: add ACPI framework 2017-04-11 16:29:54 +01:00
arm_pmu.c drivers/perf: arm_pmu: Request PMU SPIs with IRQF_PER_CPU 2017-07-27 13:43:22 +01:00
arm_pmu_acpi.c drivers/perf: arm_pmu_acpi: avoid perf IRQ init when guest PMU is off 2017-05-30 12:40:03 +01:00
arm_pmu_platform.c perf: Convert to using %pOF instead of full_name 2017-07-20 10:28:41 +01:00
qcom_l2_pmu.c perf: qcom_l2: fix column exclusion check 2017-07-26 09:27:43 +01:00
qcom_l3_pmu.c perf: qcom: Add L3 cache PMU driver 2017-04-03 18:53:50 +01:00
xgene_pmu.c perf: xgene: Add support for SoC PMU version 3 2017-06-22 20:16:34 +01:00