Chris Dearman fe99f1b184 [MIPS] lockdep: Deal with interrupt disable hazard in TRACE_IRQFLAGS
Between the mtc0 or di instruction that disables interrupts and the
following hazard barrier a processor may still take interrupts.  If an
interrupt is taken after interrupts are disabled but before the state
is updated it will appear to restore_all that it is incorrectly returning
with interrupts disabled.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
2007-03-29 23:46:35 +01:00
..
2007-03-28 13:59:37 -07:00
2007-03-28 13:59:37 -07:00
2007-03-29 10:25:32 -07:00
2007-03-28 13:59:37 -07:00
2007-02-17 19:07:33 +01:00
2007-03-26 20:43:46 +02:00
2007-03-28 17:24:47 +09:00
2007-03-26 21:49:13 -07:00
2007-03-29 08:22:25 -07:00