From 639b4ac7bdfbee28acc7f3651e90ef2a7ec16501 Mon Sep 17 00:00:00 2001
From: Denis Drakhnia <numas13@gmail.com>
Date: Sat, 13 Jan 2024 15:14:10 +0200
Subject: [PATCH] asm/win: add same physical register access tests

---
 tests/asm/meson.build             |  2 ++
 tests/asm/win/same-reg-access-1.S | 29 +++++++++++++++++++++++++++++
 tests/asm/win/same-reg-access-2.S | 29 +++++++++++++++++++++++++++++
 3 files changed, 60 insertions(+)
 create mode 100644 tests/asm/win/same-reg-access-1.S
 create mode 100644 tests/asm/win/same-reg-access-2.S

diff --git a/tests/asm/meson.build b/tests/asm/meson.build
index 55ca0d0..69d1fd7 100644
--- a/tests/asm/meson.build
+++ b/tests/asm/meson.build
@@ -70,6 +70,8 @@ asm_tests = {
     'out-of-bounds-2': { 'should_fail': true },
     'out-of-bounds-3': { 'should_fail': true },
     'br-1': {},
+    'same-reg-access-1': {},
+    'same-reg-access-2': {},
   },
   'ct': {
     'ibranch-1': {},
diff --git a/tests/asm/win/same-reg-access-1.S b/tests/asm/win/same-reg-access-1.S
new file mode 100644
index 0000000..21c446b
--- /dev/null
+++ b/tests/asm/win/same-reg-access-1.S
@@ -0,0 +1,29 @@
+#include "test_start.S"
+
+    {
+        setwd wsz=8, nfx=1
+        setbn rsz=3, rbs=4, rcur=0
+    }
+    {
+        ldd,0 [ mem ], %empty
+    }
+    {
+        addd,1 0, 0, %r8
+        addd,2 0, 0, %r9
+    }
+    {
+        ldd,0 [ mem ], %r8
+        ldd,2 [ mem ], %r9
+    }
+    {
+        addd,0 %b[0], 0, %r0
+        addd,2 %b[1], 0, %r1
+    }
+        assert_eq_i64(%r0, 0xdeadbeef)
+        assert_eq_i64(%r1, 0xdeadbeef)
+
+#include "test_end.S"
+
+    .section ".rodata"
+mem:
+    .quad 0xdeadbeef
diff --git a/tests/asm/win/same-reg-access-2.S b/tests/asm/win/same-reg-access-2.S
new file mode 100644
index 0000000..5ea240a
--- /dev/null
+++ b/tests/asm/win/same-reg-access-2.S
@@ -0,0 +1,29 @@
+#include "test_start.S"
+
+    {
+        setwd wsz=8, nfx=1
+        setbn rsz=3, rbs=4, rcur=0
+    }
+    {
+        ldd,0 [ mem ], %empty
+    }
+    {
+        addd,1 0, 0, %b[0]
+        addd,2 0, 0, %b[1]
+    }
+    {
+        ldd,0 [ mem ], %b[0]
+        ldd,2 [ mem ], %b[1]
+    }
+    {
+        addd,0 %r8, 0, %r0
+        addd,2 %r9, 0, %r1
+    }
+        assert_eq_i64(%r0, 0xdeadbeef)
+        assert_eq_i64(%r1, 0xdeadbeef)
+
+#include "test_end.S"
+
+    .section ".rodata"
+mem:
+    .quad 0xdeadbeef