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asm/ct: invalid pred in prologue

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This commit is contained in:
Denis Drakhnia 2024-01-03 14:44:52 +02:00
parent e6293f9b40
commit 658b061ecd
2 changed files with 11 additions and 0 deletions
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1
tests/asm/meson.build
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@ -155,6 +155,7 @@ asm_tests = {
'qual-4': {}, 'qual-4': {},
'qual-call-1': { 'should_fail': true }, 'qual-call-1': { 'should_fail': true },
'qual-ct-1': { 'should_fail': true }, 'qual-ct-1': { 'should_fail': true },
'qual-ct-2': {},
'qual-ibranch-1': { 'should_fail': true }, 'qual-ibranch-1': { 'should_fail': true },
'std-1': {}, 'std-1': {},
'udivs-1': { 'should_fail': true }, 'udivs-1': { 'should_fail': true },

10
tests/asm/sm/qual-ct-2.S Normal file
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@ -0,0 +1,10 @@
#include "test_start.S"
disp %ctpr1, 0f
rwd,0 (1 << 48) | (1UL << 37) | 1, %lsr
invalid64 %g16
cmpedb,0,sm 0, %g16, %pred0
ct %ctpr1 ? %pred0 && #NOT_LOOP_END
0:
#include "test_end.S"