From 7fb8c90459181da4ac5c35ec93702803cb3e2cd3 Mon Sep 17 00:00:00 2001 From: Denis Drakhnia Date: Sat, 23 Dec 2023 20:58:11 +0200 Subject: [PATCH] asm/plu: add cascading and clp-arg tests --- tests/asm/meson.build | 3 +++ tests/asm/plu/cascading-1.S | 39 +++++++++++++++++++++++++++++++++++++ tests/asm/plu/cascading-2.S | 33 +++++++++++++++++++++++++++++++ tests/asm/plu/clp-arg-1.S | 22 +++++++++++++++++++++ 4 files changed, 97 insertions(+) create mode 100644 tests/asm/plu/cascading-1.S create mode 100644 tests/asm/plu/cascading-2.S create mode 100644 tests/asm/plu/clp-arg-1.S diff --git a/tests/asm/meson.build b/tests/asm/meson.build index 3764048..eb38434 100644 --- a/tests/asm/meson.build +++ b/tests/asm/meson.build @@ -87,6 +87,9 @@ asm_tests = { 'andp-1': {}, 'landp-1': {}, 'movep-1': {}, + 'cascading-1': {}, + 'cascading-2': {}, + 'clp-arg-1': {}, }, 'int': { 'basic-1': {}, diff --git a/tests/asm/plu/cascading-1.S b/tests/asm/plu/cascading-1.S new file mode 100644 index 0000000..e99c241 --- /dev/null +++ b/tests/asm/plu/cascading-1.S @@ -0,0 +1,39 @@ +#include "test_start.S" + + { + cmpesb,0 0, 0, %pred0 + cmpesb,1 0, 0, %pred1 + cmpesb,3 0, 0, %pred2 + cmpesb,4 0, 0, %pred3 + } + { + cmpesb,0 0, 1, %pred4 + cmpesb,1 0, 1, %pred5 + } + { + pass %pred0, @p0 + pass %pred1, @p1 + pass %pred2, @p2 + pass %pred3, @p3 + landp @p0, @p1, @p4 + landp @p2, @p4, @p5 + pass @p5, %pred4 + } + { + pass %pred0, @p0 + pass %pred1, @p1 + pass %pred2, @p2 + pass %pred3, @p3 + landp @p0, @p1, @p4 + landp @p2, @p3, @p5 + landp @p4, @p5, @p6 + pass @p6, %pred5 + } + assert(%pred0) + assert(%pred1) + assert(%pred2) + assert(%pred3) + assert(%pred4) + assert(%pred5) + +#include "test_end.S" diff --git a/tests/asm/plu/cascading-2.S b/tests/asm/plu/cascading-2.S new file mode 100644 index 0000000..911556f --- /dev/null +++ b/tests/asm/plu/cascading-2.S @@ -0,0 +1,33 @@ +#include "test_start.S" + +// XXX: Probably it is UB, but CPUs execute it as expected for user. + + { + cmpesb,0 0, 0, %pred0 + cmpesb,1 0, 0, %pred1 + cmpesb,3 0, 0, %pred2 + cmpesb,4 0, 0, %pred3 + } + cmpesb,0 0, 1, %pred4 +// { +// pass %pred0, @p0 +// pass %pred1, @p1 +// pass %pred2, @p2 +// pass %pred3, @p3 +// landp @p0, @p1, @p4 +// landp @p4, @p2, @p5 +// landp @p5, @p3, @p6 +// pass @p6, %pred4 +// } + .word 0x000c0010 + .word 0x000054e4 + .word 0x62635080 + .word 0x60614040 + + assert(%pred4) + assert(%pred0) + assert(%pred1) + assert(%pred2) + assert(%pred3) + +#include "test_end.S" diff --git a/tests/asm/plu/clp-arg-1.S b/tests/asm/plu/clp-arg-1.S new file mode 100644 index 0000000..9b65617 --- /dev/null +++ b/tests/asm/plu/clp-arg-1.S @@ -0,0 +1,22 @@ +#include "test_start.S" + +// XXX: Probably it is UB, but CPUs execute it as expected for user. + + { + cmpesb,0 0, 0, %pred0 + cmpesb,1 0, 1, %pred1 + } +// { +// pass %pred0, @p2 +// pass %pred0, @p3 +// landp @p2, @p3, @p4 +// pass @p4, %pred4 +// } + .word 0x00080010 + .word 0x00000000 + .word 0x60600000 + .word 0x000008e1 + assert(%pred0) + assert(%pred1) + +#include "test_end.S"