base: add signal tests

This commit is contained in:
Denis Drakhnia 2023-12-25 07:38:16 +02:00
parent 2279fe00f7
commit 98dc504a04
4 changed files with 88 additions and 1 deletions

14
tests/asm/base/signal-1.S Normal file
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@ -0,0 +1,14 @@
#include "test_start.S"
sys_rt_sigaction SIGSEGV, act
ldb,5 [ 0 ], %empty
sys_exit 1
#include "test_end.S"
sig_handler:
sys_exit 0
.section ".rodata"
act:
init_sigaction sig_handler

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@ -3,6 +3,8 @@
#define NR_exit 1 #define NR_exit 1
#define NR_write 4 #define NR_write 4
#define NR_rt_sigaction 174
#define NR_rt_sigreturn 173
#define SCRATCH_REG0 %g23 #define SCRATCH_REG0 %g23
#define SCRATCH_REG1 %g22 #define SCRATCH_REG1 %g22
@ -92,6 +94,77 @@
#define writeln(MSG) write(MSG "\n") #define writeln(MSG) write(MSG "\n")
#define SIGHUP 1
#define SIGINT 2
#define SIGQUIT 3
#define SIGILL 4
#define SIGTRAP 5
#define SIGABRT 6
#define SIGIOT 6
#define SIGBUS 7
#define SIGFPE 8
#define SIGKILL 9
#define SIGUSR1 10
#define SIGSEGV 11
#define SIGUSR2 12
#define SIGPIPE 13
#define SIGALRM 14
#define SIGTERM 15
#define SIGSTKFLT 16
#define SIGCHLD 17
#define SIGCONT 18
#define SIGSTOP 19
#define SIGTSTP 20
#define SIGTTIN 21
#define SIGTTOU 22
#define SIGURG 23
#define SIGXCPU 24
#define SIGXFSZ 25
#define SIGVTALRM 26
#define SIGPROF 27
#define SIGWINCH 28
#define SIGIO 29
#define SIGPWR 30
#define SIGSYS 31
#define SIGRTMIN 32
#define SA_SIGINFO 0x00000004
.macro init_sigaction handler=0, flags=0, restorer=0, mask=0
.quad \handler
.quad \flags
.quad \restorer
.quad \mask
.endm
.macro sys_rt_sigaction sig, acc=0, oldacc=0
{
setwd wsz=8, nfx=1
addd,0 0, NR_rt_sigaction, %r8
addd,1 0, \sig, %r9
sdisp %ctpr1, 0x3
nop 4
}
{
addd,0 0, \acc, %r10
addd,1 0, \oldacc, %r11
addd,2 0, 8, %r12
call %ctpr1, wbs=4
}
.endm
.macro sys_rt_sigreturn
{
setwd wsz=8, nfx=1
sdisp %ctpr1, 0x3
}
{
addd,0 0, NR_rt_sigreturn, %r8
addd,1 0, 0, %r9
call %ctpr1, wbs=4
}
.endm
#define assert_(PRED, MSG) \ #define assert_(PRED, MSG) \
ibranch local(ok) ? PRED; \ ibranch local(ok) ? PRED; \
write("assert at " __FILE__ ":" str(__LINE__) ":\n" \ write("assert at " __FILE__ ":" str(__LINE__) ":\n" \

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@ -43,6 +43,7 @@ asm_tests = {
'exit-0': {}, 'exit-0': {},
'exit-1': { 'should_fail': true }, 'exit-1': { 'should_fail': true },
'template': {}, 'template': {},
'signal-1': {},
}, },
'win': { 'win': {
'setwd-1': {}, 'setwd-1': {},

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@ -1,3 +1,2 @@
subdir('asm') subdir('asm')
subdir('c') subdir('c')