syscall: add access hw stack tests

tests/asm/base/excp-1.S

@@ -0,0 +1,24 @@
+#include "test_start.S"
+
+        sys_rt_sigaction SIGSEGV, act
+        addd,0 0, 1, %g16
+    {
+        stb,2 %g16, [ flag ]
+        ldb,5 [ 0 ], %empty
+    }
+        sys_exit 1
+
+#include "test_end.S"
+
+sig_handler:
+        ldb,0 [ flag ], %g16
+        assert_eq_i64(%g16, 1)
+        exit_with_code
+
+    .section ".rodata"
+act:
+    init_sigaction sig_handler
+
+    .data
+flag:
+    .byte 0

tests/asm/base/excp-2.S

@@ -0,0 +1,24 @@
+#include "test_start.S"
+
+        sys_rt_sigaction SIGSEGV, act
+        addd,0 0, 1, %g16
+    {
+        ldb,0 [ 0 ], %empty
+        stb,2 %g16, [ flag ]
+    }
+        sys_exit 1
+
+#include "test_end.S"
+
+sig_handler:
+        ldb,0 [ flag ], %g16
+        assert_eq_i64(%g16, 0)
+        exit_with_code
+
+    .section ".rodata"
+act:
+    init_sigaction sig_handler
+
+    .data
+flag:
+    .byte 0

tests/asm/base/signal-1.S

@@ -0,0 +1,14 @@
+#include "test_start.S"
+
+        sys_rt_sigaction SIGSEGV, act
+        ldb,5 [ 0 ], %empty
+        sys_exit 1
+
+#include "test_end.S"
+
+sig_handler:
+        sys_exit 0
+
+    .section ".rodata"
+act:
+    init_sigaction sig_handler

tests/asm/include/common.S

@@ -3,6 +3,9 @@
 
 #define NR_exit      1
 #define NR_write     4
+#define NR_rt_sigaction 174
+#define NR_rt_sigreturn 173
+#define NR_access_hw_stacks 254
 
 #define SCRATCH_REG0 %g23
 #define SCRATCH_REG1 %g22
@@ -54,7 +57,7 @@
 #define exit(code) sys_exit code
 
     .macro set_exit_code code=0
-        addd,0 0, 1, SCRATCH_REG3; \
+        addd,0 0, \code, SCRATCH_REG3; \
         stb,2 SCRATCH_REG3, [ exit_code ]; \
     .endm
 
@@ -73,6 +76,15 @@
     }
     .endm
 
+    .macro exit_with_code
+        ldb,0 [ exit_code ], SCRATCH_REG3
+        sys_exit SCRATCH_REG3
+    .endm
+
+    .macro skip_test
+        sys_exit 77
+    .endm
+
 #define write(MSG) \
         .pushsection ".rodata"; \
     local(str):; \
@@ -83,6 +95,109 @@
 
 #define writeln(MSG) write(MSG "\n")
 
+#define SIGHUP           1
+#define SIGINT           2
+#define SIGQUIT          3
+#define SIGILL           4
+#define SIGTRAP          5
+#define SIGABRT          6
+#define SIGIOT           6
+#define SIGBUS           7
+#define SIGFPE           8
+#define SIGKILL          9
+#define SIGUSR1         10
+#define SIGSEGV         11
+#define SIGUSR2         12
+#define SIGPIPE         13
+#define SIGALRM         14
+#define SIGTERM         15
+#define SIGSTKFLT       16
+#define SIGCHLD         17
+#define SIGCONT         18
+#define SIGSTOP         19
+#define SIGTSTP         20
+#define SIGTTIN         21
+#define SIGTTOU         22
+#define SIGURG          23
+#define SIGXCPU         24
+#define SIGXFSZ         25
+#define SIGVTALRM       26
+#define SIGPROF         27
+#define SIGWINCH        28
+#define SIGIO           29
+#define SIGPWR          30
+#define SIGSYS          31
+#define SIGRTMIN        32
+
+#define SA_SIGINFO       0x00000004
+
+    .macro init_sigaction handler=0, flags=0, restorer=0, mask=0
+        .quad \handler
+        .quad \flags
+        .quad \restorer
+        .quad \mask
+    .endm
+
+    .macro sys_rt_sigaction sig, acc=0, oldacc=0
+    {
+        setwd wsz=8, nfx=1
+        addd,0 0, NR_rt_sigaction, %r8
+        addd,1 0, \sig, %r9
+        sdisp %ctpr1, 0x3
+        nop 4
+    }
+    {
+        addd,0 0, \acc, %r10
+        addd,1 0, \oldacc, %r11
+        addd,2 0, 8, %r12
+        call %ctpr1, wbs=4
+    }
+    .endm
+
+    .macro sys_rt_sigreturn
+        {
+            setwd wsz=8, nfx=1
+            sdisp %ctpr1, 0x3
+        }
+        {
+            addd,0 0, NR_rt_sigreturn, %r8
+            addd,1 0, 0, %r9
+            call %ctpr1, wbs=4
+        }
+    .endm
+
+#define READ_CHAIN_STACK            0
+#define READ_PROCEDURE_STACK        1
+#define WRITE_PROCEDURE_STACK       2
+#define GET_CHAIN_STACK_OFFSET      3
+#define GET_CHAIN_STACK_SIZE        4
+#define GET_PROCEDURE_STACK_SIZE    5
+#define READ_CHAIN_STACK_EX         6
+#define READ_PROCEDURE_STACK_EX     7
+#define WRITE_PROCEDURE_STACK_EX    8
+#define WRITE_CHAIN_STACK_EX        9
+
+    .macro sys_access_hw_stacks mode, frame_addr=0, buf_addr=0, buf_size=0, size_addr=0
+    {
+        setwd wsz=8, nfx=1
+        sdisp %ctpr1, 0x3
+    }
+    {
+        addd,0 0, NR_access_hw_stacks, %r8
+        addd,1 0, \mode, %r9
+    }
+    {
+        nop 2
+        addd,0 0, \frame_addr, %r10
+        addd,1 0, \buf_addr, %r11
+    }
+    {
+        addd,0 0, \buf_size, %r12
+        addd,1 0, \size_addr, %r13
+        call %ctpr1, wbs=4
+    }
+    .endm
+
 #define assert_(PRED, MSG) \
             ibranch local(ok) ? PRED; \
             write("assert at " __FILE__ ":" str(__LINE__) ":\n" \
@@ -143,8 +258,11 @@
             set_exit_code 1; \
     local(ok):
 
-#define assert_ne_i32(LEFT, RIGHT, MSG) assert_ne(cmpesb, LEFT, RIGHT, MSG)
-#define assert_ne_i64(LEFT, RIGHT, MSG) assert_ne(cmpedb, LEFT, RIGHT, MSG)
+#define assert_ne_i32(LEFT, RIGHT) assert_ne(cmpesb, LEFT, RIGHT, "")
+#define assert_ne_i64(LEFT, RIGHT) assert_ne(cmpedb, LEFT, RIGHT, "")
+
+#define assert_ne_i32m(LEFT, RIGHT, MSG) assert_ne(cmpesb, LEFT, RIGHT, MSG)
+#define assert_ne_i64m(LEFT, RIGHT, MSG) assert_ne(cmpedb, LEFT, RIGHT, MSG)
 
 #define test_helper(OP, CMP, S1, S2, EXPECTED) \
         { \
@@ -165,10 +283,6 @@
 #define test_i32(OP, S1, S2, EXPECTED) test_helper(OP, cmpesb, S1, S2, EXPECTED)
 #define test_i64(OP, S1, S2, EXPECTED) test_helper(OP, cmpedb, S1, S2, EXPECTED)
 
-    .macro skip_test
-        exit(77)
-    .endm
-
 #define MDL_E4S         3   /* Elbrus-4S  */
 #define MDL_E2S         4   /* Elbrus-2S+ */
 #define MDL_E2SM        6   /* Elbrus-2SM */

tests/asm/include/test_end.S

@@ -1,8 +1,7 @@
 #ifndef SRC_BASE_TEST_END_H
 #define SRC_BASE_TEST_END_H
 
-        ldb,0 [ exit_code ], SCRATCH_REG3
-        exit(SCRATCH_REG3)
+        exit_with_code
     .size _start, . - _start
 
     .pushsection ".data"

tests/asm/meson.build

@@ -43,6 +43,9 @@ asm_tests = {
     'exit-0': {},
     'exit-1': { 'should_fail': true },
     'template': {},
+    'signal-1': {},
+    'excp-1': {},
+    'excp-2': {},
   },
   'win': {
     'setwd-1': {},
@@ -161,6 +164,14 @@ asm_tests = {
     'dam-1': {},
     'dam-2': {},
   },
+  'syscall': {
+    'get-ps-size-1': {},
+    'get-pcs-size-1': {},
+    'get-pcs-offset-1': {},
+    'read-ps-ex-1': {},
+    'read-ps-ex-unaligned-1': { 'should_fail': true },
+    'write-ps-ex-1': {},
+  },
 }
 
 foreach suite, tests : asm_tests

tests/asm/syscall/get-pcs-offset-1.S

@@ -0,0 +1,22 @@
+#include "test_start.S"
+
+        setwd wsz=8, nfx=1
+        rrd,0 %pcsp.lo, %g16
+        rrd,0 %pcsp.hi, %g17
+    {
+        andd,0 %g16, (1ULL << 48) - 1, %g16
+        andd,1 %g17, (1ULL << 32) - 1, %g17
+    }
+        addd,0 %g16, %g17, %g16
+        std,2 %g16, [ frame ]
+        sys_access_hw_stacks GET_CHAIN_STACK_OFFSET, frame, 0, 0, offset
+        assert_eq_i64(%r8, 0)
+
+#include "test_end.S"
+
+    .data
+    .balign 8
+frame:
+    .quad 0
+offset:
+    .quad 0

tests/asm/syscall/get-pcs-size-1.S

@@ -0,0 +1,15 @@
+#include "test_start.S"
+
+        setwd wsz=8, nfx=1
+        sys_access_hw_stacks GET_CHAIN_STACK_SIZE, 0, 0, 0, size
+        assert_eq_i64(%r8, 0)
+        ldd,0 [ size ], %g16
+        assert_ne_i64(%g16, 0)
+
+#include "test_end.S"
+
+    .data
+    .balign 8
+    .byte 0
+size:
+    .quad 0

tests/asm/syscall/get-ps-size-1.S

@@ -0,0 +1,15 @@
+#include "test_start.S"
+
+        setwd wsz=8, nfx=1
+        sys_access_hw_stacks GET_PROCEDURE_STACK_SIZE, 0, 0, 0, size
+        assert_eq_i64(%r8, 0)
+        ldd,0 [ size ], %g16
+        assert_ne_i64(%g16, 0)
+
+#include "test_end.S"
+
+    .data
+    .balign 8
+    .byte 0
+size:
+    .quad 0

tests/asm/syscall/read-ps-ex-1.S

@@ -0,0 +1,46 @@
+#include "test_start.S"
+
+    {
+        setwd wsz=8, nfx=1
+        disp %ctpr1, 0f
+    }
+    {
+        addd,0 0, 0xdeadbeef, %r8
+        addd,1 0, 8, %r9
+        call %ctpr1, wbs=4
+    }
+
+#include "test_end.S"
+
+0:
+    {
+        setwd wsz=8, nfx=1
+        disp %ctpr1, 0b
+    }
+    {
+        cmpedb,0 %r1, 0, %pred0
+        addd,1 0, 0xdeadbeef, %r8
+        subd,2 %r1, 1, %r9
+    }
+        call %ctpr1, wbs=4 ? ~%pred0
+        ibranch 0f ? ~%pred0
+
+        sys_access_hw_stacks GET_PROCEDURE_STACK_SIZE, 0, 0, 0, size
+        ldd,0 [ size ], %g16
+        subd,0 %g16, 128, %g16
+        std,2 %g16, [ frame ]
+        sys_access_hw_stacks READ_PROCEDURE_STACK_EX, frame, buf, 128
+        ldd,0 0, buf, %g16
+        assert_eq_i64(%g16, 0xdeadbeef)
+0:
+        return %ctpr3
+        ct %ctpr3
+
+    .data
+    .balign 8
+buf:
+    .fill 64, 1, 0
+size:
+    .quad 0
+frame:
+    .quad 0

tests/asm/syscall/read-ps-ex-unaligned-1.S

@@ -0,0 +1,47 @@
+#include "test_start.S"
+
+    {
+        setwd wsz=8, nfx=1
+        disp %ctpr1, 0f
+    }
+    {
+        addd,0 0, 0xdeadbeef, %r8
+        addd,1 0, 8, %r9
+        call %ctpr1, wbs=4
+    }
+
+#include "test_end.S"
+
+0:
+    {
+        setwd wsz=8, nfx=1
+        disp %ctpr1, 0b
+    }
+    {
+        cmpedb,0 %r1, 0, %pred0
+        addd,1 0, 0xdeadbeef, %r8
+        subd,2 %r1, 1, %r9
+    }
+        call %ctpr1, wbs=4 ? ~%pred0
+        ibranch 0f ? ~%pred0
+
+        sys_access_hw_stacks GET_PROCEDURE_STACK_SIZE, 0, 0, 0, size
+        ldd,0 [ size ], %g16
+        subd,0 %g16, 128, %g16
+        std,2 %g16, [ frame ]
+        sys_access_hw_stacks READ_PROCEDURE_STACK_EX, frame, buf, 128
+        ldd,0 0, buf, %g16
+        assert_eq_i64(%g16, 0xdeadbeef)
+0:
+        return %ctpr3
+        ct %ctpr3
+
+    .data
+    .balign 8
+    .byte 0
+buf:
+    .fill 64, 1, 0
+size:
+    .quad 0
+frame:
+    .quad 0

tests/asm/syscall/write-ps-ex-1.S

@@ -0,0 +1,33 @@
+#include "test_start.S"
+
+    {
+        setwd wsz=8, nfx=1
+        disp %ctpr1, 0f
+    }
+    {
+        addd,0 0, 0, %r0
+        call %ctpr1, wbs=4
+    }
+        assert_eq_i64(%r0, 0xdeadbeef)
+
+#include "test_end.S"
+
+0:
+        setwd wsz=8, nfx=1
+        sys_access_hw_stacks GET_PROCEDURE_STACK_SIZE, 0, 0, 0, size
+        ldd,0 [ size ], %g16
+        subd,0 %g16, 256, %g16
+        std,2 %g16, [ frame ]
+        sys_access_hw_stacks WRITE_PROCEDURE_STACK_EX, frame, buf, 8
+        assert_eq_i64(%r8, 0)
+        return %ctpr3
+        ct %ctpr3
+
+    .data
+    .balign 8
+buf:
+    .quad 0xdeadbeef
+size:
+    .quad 0
+frame:
+    .quad 0

tests/meson.build

@@ -1,3 +1,2 @@
 subdir('asm')
 subdir('c')
-