25 lines
633 B
ArmAsm
25 lines
633 B
ArmAsm
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.org 0x200 /* lowcore padding */
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.globl _start
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_start:
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lpswe start24_psw
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_start24:
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lgrl %r0,initial_r0
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lgrl %r1,expected_r0
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bal %r0,0f
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0:
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cgrjne %r0,%r1,1f
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lpswe success_psw
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1:
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lpswe failure_psw
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.align 8
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start24_psw:
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.quad 0x160000000000,_start24 /* 24-bit mode, cc = 1, pm = 6 */
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initial_r0:
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.quad 0x1234567887654321
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expected_r0:
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.quad 0x1234567896000000 + 0b /* ilc = 2, cc = 1, pm = 6 */
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success_psw:
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.quad 0x2000000000000,0xfff /* see is_special_wait_psw() */
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failure_psw:
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.quad 0x2000000000000,0 /* disabled wait */
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