2012-07-04 12:43:34 +02:00
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/*
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* KZM Board System emulation.
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*
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* Copyright (c) 2008 OKL and 2011 NICTA
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* Written by Hans at OK-Labs
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* Updated by Peter Chubb.
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*
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2012-08-10 22:03:26 +02:00
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* This code is licensed under the GPL, version 2 or later.
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2012-07-04 12:43:34 +02:00
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* See the file `COPYING' in the top level directory.
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*
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* It (partially) emulates a Kyoto Microcomputer
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* KZM-ARM11-01 evaluation board, with a Freescale
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* i.MX31 SoC
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*/
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#include "sysbus.h"
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2012-12-17 18:19:49 +01:00
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#include "exec/address-spaces.h"
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2012-07-04 12:43:34 +02:00
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#include "hw.h"
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#include "arm-misc.h"
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#include "devices.h"
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2012-10-24 08:43:34 +02:00
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#include "net/net.h"
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2012-12-17 18:20:04 +01:00
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#include "sysemu/sysemu.h"
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2012-07-04 12:43:34 +02:00
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#include "boards.h"
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2012-10-17 09:54:19 +02:00
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#include "serial.h"
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2012-07-04 12:43:34 +02:00
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#include "imx.h"
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/* Memory map for Kzm Emulation Baseboard:
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* 0x00000000-0x00003fff 16k secure ROM IGNORED
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* 0x00004000-0x00407fff Reserved IGNORED
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* 0x00404000-0x00407fff ROM IGNORED
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* 0x00408000-0x0fffffff Reserved IGNORED
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* 0x10000000-0x1fffbfff RAM aliasing IGNORED
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* 0x1fffc000-0x1fffffff RAM EMULATED
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* 0x20000000-0x2fffffff Reserved IGNORED
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* 0x30000000-0x7fffffff I.MX31 Internal Register Space
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* 0x43f00000 IO_AREA0
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* 0x43f90000 UART1 EMULATED
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* 0x43f94000 UART2 EMULATED
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* 0x68000000 AVIC EMULATED
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* 0x53f80000 CCM EMULATED
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* 0x53f94000 PIT 1 EMULATED
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* 0x53f98000 PIT 2 EMULATED
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* 0x53f90000 GPT EMULATED
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* 0x80000000-0x87ffffff RAM EMULATED
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* 0x88000000-0x8fffffff RAM Aliasing EMULATED
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* 0xa0000000-0xafffffff NAND Flash IGNORED
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* 0xb0000000-0xb3ffffff Unavailable IGNORED
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* 0xb4000000-0xb4000fff 8-bit free space IGNORED
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* 0xb4001000-0xb400100f Board control IGNORED
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* 0xb4001003 DIP switch
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* 0xb4001010-0xb400101f 7-segment LED IGNORED
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* 0xb4001020-0xb400102f LED IGNORED
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* 0xb4001030-0xb400103f LED IGNORED
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* 0xb4001040-0xb400104f FPGA, UART EMULATED
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* 0xb4001050-0xb400105f FPGA, UART EMULATED
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* 0xb4001060-0xb40fffff FPGA IGNORED
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* 0xb6000000-0xb61fffff LAN controller EMULATED
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* 0xb6200000-0xb62fffff FPGA NAND Controller IGNORED
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* 0xb6300000-0xb7ffffff Free IGNORED
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* 0xb8000000-0xb8004fff Memory control registers IGNORED
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* 0xc0000000-0xc3ffffff PCMCIA/CF IGNORED
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* 0xc4000000-0xffffffff Reserved IGNORED
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*/
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#define KZM_RAMADDRESS (0x80000000)
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#define KZM_FPGA (0xb4001040)
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static struct arm_boot_info kzm_binfo = {
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.loader_start = KZM_RAMADDRESS,
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.board_id = 1722,
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};
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2012-10-15 22:22:02 +02:00
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static void kzm_init(QEMUMachineInitArgs *args)
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2012-07-04 12:43:34 +02:00
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{
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2012-10-15 22:22:02 +02:00
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ram_addr_t ram_size = args->ram_size;
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const char *cpu_model = args->cpu_model;
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const char *kernel_filename = args->kernel_filename;
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const char *kernel_cmdline = args->kernel_cmdline;
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const char *initrd_filename = args->initrd_filename;
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2012-07-04 12:43:34 +02:00
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ARMCPU *cpu;
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MemoryRegion *address_space_mem = get_system_memory();
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MemoryRegion *ram = g_new(MemoryRegion, 1);
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MemoryRegion *sram = g_new(MemoryRegion, 1);
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MemoryRegion *ram_alias = g_new(MemoryRegion, 1);
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qemu_irq *cpu_pic;
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DeviceState *dev;
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DeviceState *ccm;
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if (!cpu_model) {
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cpu_model = "arm1136";
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}
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cpu = cpu_arm_init(cpu_model);
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if (!cpu) {
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fprintf(stderr, "Unable to find CPU definition\n");
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exit(1);
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}
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/* On a real system, the first 16k is a `secure boot rom' */
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memory_region_init_ram(ram, "kzm.ram", ram_size);
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vmstate_register_ram_global(ram);
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memory_region_add_subregion(address_space_mem, KZM_RAMADDRESS, ram);
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memory_region_init_alias(ram_alias, "ram.alias", ram, 0, ram_size);
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memory_region_add_subregion(address_space_mem, 0x88000000, ram_alias);
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memory_region_init_ram(sram, "kzm.sram", 0x4000);
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memory_region_add_subregion(address_space_mem, 0x1FFFC000, sram);
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cpu_pic = arm_pic_init_cpu(cpu);
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dev = sysbus_create_varargs("imx_avic", 0x68000000,
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cpu_pic[ARM_PIC_CPU_IRQ],
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cpu_pic[ARM_PIC_CPU_FIQ], NULL);
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imx_serial_create(0, 0x43f90000, qdev_get_gpio_in(dev, 45));
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imx_serial_create(1, 0x43f94000, qdev_get_gpio_in(dev, 32));
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ccm = sysbus_create_simple("imx_ccm", 0x53f80000, NULL);
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imx_timerp_create(0x53f94000, qdev_get_gpio_in(dev, 28), ccm);
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imx_timerp_create(0x53f98000, qdev_get_gpio_in(dev, 27), ccm);
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imx_timerg_create(0x53f90000, qdev_get_gpio_in(dev, 29), ccm);
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2012-07-24 17:35:11 +02:00
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if (nd_table[0].used) {
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2012-07-04 12:43:34 +02:00
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lan9118_init(&nd_table[0], 0xb6000000, qdev_get_gpio_in(dev, 52));
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}
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if (serial_hds[2]) { /* touchscreen */
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serial_mm_init(address_space_mem, KZM_FPGA+0x10, 0,
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qdev_get_gpio_in(dev, 52),
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14745600, serial_hds[2],
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DEVICE_NATIVE_ENDIAN);
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}
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kzm_binfo.ram_size = ram_size;
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kzm_binfo.kernel_filename = kernel_filename;
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kzm_binfo.kernel_cmdline = kernel_cmdline;
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kzm_binfo.initrd_filename = initrd_filename;
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kzm_binfo.nb_cpus = 1;
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arm_load_kernel(cpu, &kzm_binfo);
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}
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static QEMUMachine kzm_machine = {
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.name = "kzm",
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.desc = "ARM KZM Emulation Baseboard (ARM1136)",
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.init = kzm_init,
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};
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static void kzm_machine_init(void)
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{
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qemu_register_machine(&kzm_machine);
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}
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machine_init(kzm_machine_init)
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