2009-11-20 01:21:33 +01:00
|
|
|
/*
|
|
|
|
* MAXIM DS1338 I2C RTC+NVRAM
|
|
|
|
*
|
|
|
|
* Copyright (c) 2009 CodeSourcery.
|
|
|
|
* Written by Paul Brook
|
|
|
|
*
|
2011-06-26 04:21:35 +02:00
|
|
|
* This code is licensed under the GNU GPL v2.
|
2012-01-13 17:44:23 +01:00
|
|
|
*
|
|
|
|
* Contributions after 2012-01-13 are licensed under the terms of the
|
|
|
|
* GNU GPL, version 2 or (at your option) any later version.
|
2009-11-20 01:21:33 +01:00
|
|
|
*/
|
|
|
|
|
2016-01-26 19:17:18 +01:00
|
|
|
#include "qemu/osdep.h"
|
2016-01-19 21:51:44 +01:00
|
|
|
#include "qemu-common.h"
|
2013-02-05 17:06:20 +01:00
|
|
|
#include "hw/i2c/i2c.h"
|
2016-03-20 18:16:19 +01:00
|
|
|
#include "qemu/bcd.h"
|
2009-11-20 01:21:33 +01:00
|
|
|
|
2012-10-12 12:54:38 +02:00
|
|
|
/* Size of NVRAM including both the user-accessible area and the
|
|
|
|
* secondary register area.
|
|
|
|
*/
|
|
|
|
#define NVRAM_SIZE 64
|
|
|
|
|
2012-12-13 15:05:27 +01:00
|
|
|
/* Flags definitions */
|
|
|
|
#define SECONDS_CH 0x80
|
|
|
|
#define HOURS_12 0x40
|
|
|
|
#define HOURS_PM 0x20
|
|
|
|
#define CTRL_OSF 0x20
|
|
|
|
|
2013-12-19 22:34:05 +01:00
|
|
|
#define TYPE_DS1338 "ds1338"
|
|
|
|
#define DS1338(obj) OBJECT_CHECK(DS1338State, (obj), TYPE_DS1338)
|
|
|
|
|
|
|
|
typedef struct DS1338State {
|
|
|
|
I2CSlave parent_obj;
|
|
|
|
|
2012-10-12 12:54:38 +02:00
|
|
|
int64_t offset;
|
2012-12-13 15:05:28 +01:00
|
|
|
uint8_t wday_offset;
|
2012-10-12 12:54:38 +02:00
|
|
|
uint8_t nvram[NVRAM_SIZE];
|
2012-10-12 12:54:38 +02:00
|
|
|
int32_t ptr;
|
|
|
|
bool addr_byte;
|
2009-11-20 01:21:33 +01:00
|
|
|
} DS1338State;
|
|
|
|
|
2012-10-12 12:54:38 +02:00
|
|
|
static const VMStateDescription vmstate_ds1338 = {
|
|
|
|
.name = "ds1338",
|
2012-12-13 15:05:28 +01:00
|
|
|
.version_id = 2,
|
2012-10-12 12:54:38 +02:00
|
|
|
.minimum_version_id = 1,
|
|
|
|
.fields = (VMStateField[]) {
|
2013-12-19 22:34:05 +01:00
|
|
|
VMSTATE_I2C_SLAVE(parent_obj, DS1338State),
|
2012-10-12 12:54:38 +02:00
|
|
|
VMSTATE_INT64(offset, DS1338State),
|
2012-12-13 15:05:28 +01:00
|
|
|
VMSTATE_UINT8_V(wday_offset, DS1338State, 2),
|
2012-10-12 12:54:38 +02:00
|
|
|
VMSTATE_UINT8_ARRAY(nvram, DS1338State, NVRAM_SIZE),
|
|
|
|
VMSTATE_INT32(ptr, DS1338State),
|
|
|
|
VMSTATE_BOOL(addr_byte, DS1338State),
|
|
|
|
VMSTATE_END_OF_LIST()
|
|
|
|
}
|
|
|
|
};
|
|
|
|
|
2012-10-12 12:54:38 +02:00
|
|
|
static void capture_current_time(DS1338State *s)
|
|
|
|
{
|
|
|
|
/* Capture the current time into the secondary registers
|
|
|
|
* which will be actually read by the data transfer operation.
|
|
|
|
*/
|
2012-10-12 12:54:38 +02:00
|
|
|
struct tm now;
|
|
|
|
qemu_get_timedate(&now, s->offset);
|
|
|
|
s->nvram[0] = to_bcd(now.tm_sec);
|
|
|
|
s->nvram[1] = to_bcd(now.tm_min);
|
2012-12-13 15:05:27 +01:00
|
|
|
if (s->nvram[2] & HOURS_12) {
|
|
|
|
int tmp = now.tm_hour;
|
2013-02-28 19:23:12 +01:00
|
|
|
if (tmp % 12 == 0) {
|
|
|
|
tmp += 12;
|
2012-12-13 15:05:27 +01:00
|
|
|
}
|
|
|
|
if (tmp <= 12) {
|
|
|
|
s->nvram[2] = HOURS_12 | to_bcd(tmp);
|
|
|
|
} else {
|
|
|
|
s->nvram[2] = HOURS_12 | HOURS_PM | to_bcd(tmp - 12);
|
2012-10-12 12:54:38 +02:00
|
|
|
}
|
|
|
|
} else {
|
2012-10-12 12:54:38 +02:00
|
|
|
s->nvram[2] = to_bcd(now.tm_hour);
|
2012-10-12 12:54:38 +02:00
|
|
|
}
|
2012-12-13 15:05:28 +01:00
|
|
|
s->nvram[3] = (now.tm_wday + s->wday_offset) % 7 + 1;
|
2012-10-12 12:54:38 +02:00
|
|
|
s->nvram[4] = to_bcd(now.tm_mday);
|
2012-12-13 15:05:27 +01:00
|
|
|
s->nvram[5] = to_bcd(now.tm_mon + 1);
|
2012-10-12 12:54:38 +02:00
|
|
|
s->nvram[6] = to_bcd(now.tm_year - 100);
|
2012-10-12 12:54:38 +02:00
|
|
|
}
|
|
|
|
|
|
|
|
static void inc_regptr(DS1338State *s)
|
|
|
|
{
|
|
|
|
/* The register pointer wraps around after 0x3F; wraparound
|
|
|
|
* causes the current time/date to be retransferred into
|
|
|
|
* the secondary registers.
|
|
|
|
*/
|
|
|
|
s->ptr = (s->ptr + 1) & (NVRAM_SIZE - 1);
|
|
|
|
if (!s->ptr) {
|
|
|
|
capture_current_time(s);
|
|
|
|
}
|
|
|
|
}
|
|
|
|
|
2017-01-09 12:40:20 +01:00
|
|
|
static int ds1338_event(I2CSlave *i2c, enum i2c_event event)
|
2009-11-20 01:21:33 +01:00
|
|
|
{
|
2013-12-19 22:34:05 +01:00
|
|
|
DS1338State *s = DS1338(i2c);
|
2009-11-20 01:21:33 +01:00
|
|
|
|
|
|
|
switch (event) {
|
|
|
|
case I2C_START_RECV:
|
2012-10-12 12:54:38 +02:00
|
|
|
/* In h/w, capture happens on any START condition, not just a
|
|
|
|
* START_RECV, but there is no need to actually capture on
|
|
|
|
* START_SEND, because the guest can't get at that data
|
|
|
|
* without going through a START_RECV which would overwrite it.
|
|
|
|
*/
|
|
|
|
capture_current_time(s);
|
2009-11-20 01:21:33 +01:00
|
|
|
break;
|
|
|
|
case I2C_START_SEND:
|
2012-10-12 12:54:38 +02:00
|
|
|
s->addr_byte = true;
|
2009-11-20 01:21:33 +01:00
|
|
|
break;
|
|
|
|
default:
|
|
|
|
break;
|
|
|
|
}
|
2017-01-09 12:40:20 +01:00
|
|
|
|
|
|
|
return 0;
|
2009-11-20 01:21:33 +01:00
|
|
|
}
|
|
|
|
|
2011-12-05 03:28:27 +01:00
|
|
|
static int ds1338_recv(I2CSlave *i2c)
|
2009-11-20 01:21:33 +01:00
|
|
|
{
|
2013-12-19 22:34:05 +01:00
|
|
|
DS1338State *s = DS1338(i2c);
|
2009-11-20 01:21:33 +01:00
|
|
|
uint8_t res;
|
|
|
|
|
|
|
|
res = s->nvram[s->ptr];
|
2012-10-12 12:54:38 +02:00
|
|
|
inc_regptr(s);
|
2009-11-20 01:21:33 +01:00
|
|
|
return res;
|
|
|
|
}
|
|
|
|
|
2011-12-05 03:28:27 +01:00
|
|
|
static int ds1338_send(I2CSlave *i2c, uint8_t data)
|
2009-11-20 01:21:33 +01:00
|
|
|
{
|
2013-12-19 22:34:05 +01:00
|
|
|
DS1338State *s = DS1338(i2c);
|
|
|
|
|
2009-11-20 01:21:33 +01:00
|
|
|
if (s->addr_byte) {
|
2012-10-12 12:54:38 +02:00
|
|
|
s->ptr = data & (NVRAM_SIZE - 1);
|
2012-10-12 12:54:38 +02:00
|
|
|
s->addr_byte = false;
|
2009-11-20 01:21:33 +01:00
|
|
|
return 0;
|
|
|
|
}
|
2012-12-13 15:05:28 +01:00
|
|
|
if (s->ptr < 7) {
|
|
|
|
/* Time register. */
|
2012-10-12 12:54:38 +02:00
|
|
|
struct tm now;
|
|
|
|
qemu_get_timedate(&now, s->offset);
|
2012-10-12 12:54:38 +02:00
|
|
|
switch(s->ptr) {
|
2009-11-20 01:21:33 +01:00
|
|
|
case 0:
|
|
|
|
/* TODO: Implement CH (stop) bit. */
|
2012-10-12 12:54:38 +02:00
|
|
|
now.tm_sec = from_bcd(data & 0x7f);
|
2009-11-20 01:21:33 +01:00
|
|
|
break;
|
|
|
|
case 1:
|
2012-10-12 12:54:38 +02:00
|
|
|
now.tm_min = from_bcd(data & 0x7f);
|
2009-11-20 01:21:33 +01:00
|
|
|
break;
|
|
|
|
case 2:
|
2012-12-13 15:05:27 +01:00
|
|
|
if (data & HOURS_12) {
|
|
|
|
int tmp = from_bcd(data & (HOURS_PM - 1));
|
|
|
|
if (data & HOURS_PM) {
|
|
|
|
tmp += 12;
|
|
|
|
}
|
2013-02-28 19:23:12 +01:00
|
|
|
if (tmp % 12 == 0) {
|
|
|
|
tmp -= 12;
|
2009-11-20 01:21:33 +01:00
|
|
|
}
|
2012-12-13 15:05:27 +01:00
|
|
|
now.tm_hour = tmp;
|
2009-11-20 01:21:33 +01:00
|
|
|
} else {
|
2012-12-13 15:05:27 +01:00
|
|
|
now.tm_hour = from_bcd(data & (HOURS_12 - 1));
|
2009-11-20 01:21:33 +01:00
|
|
|
}
|
|
|
|
break;
|
|
|
|
case 3:
|
2012-12-13 15:05:28 +01:00
|
|
|
{
|
|
|
|
/* The day field is supposed to contain a value in
|
|
|
|
the range 1-7. Otherwise behavior is undefined.
|
|
|
|
*/
|
|
|
|
int user_wday = (data & 7) - 1;
|
|
|
|
s->wday_offset = (user_wday - now.tm_wday + 7) % 7;
|
|
|
|
}
|
2009-11-20 01:21:33 +01:00
|
|
|
break;
|
|
|
|
case 4:
|
2012-10-12 12:54:38 +02:00
|
|
|
now.tm_mday = from_bcd(data & 0x3f);
|
2009-11-20 01:21:33 +01:00
|
|
|
break;
|
|
|
|
case 5:
|
2012-10-12 12:54:38 +02:00
|
|
|
now.tm_mon = from_bcd(data & 0x1f) - 1;
|
2012-02-25 14:50:25 +01:00
|
|
|
break;
|
2009-11-20 01:21:33 +01:00
|
|
|
case 6:
|
2012-10-12 12:54:38 +02:00
|
|
|
now.tm_year = from_bcd(data) + 100;
|
2009-11-20 01:21:33 +01:00
|
|
|
break;
|
|
|
|
}
|
2012-10-12 12:54:38 +02:00
|
|
|
s->offset = qemu_timedate_diff(&now);
|
2012-12-13 15:05:28 +01:00
|
|
|
} else if (s->ptr == 7) {
|
|
|
|
/* Control register. */
|
|
|
|
|
|
|
|
/* Ensure bits 2, 3 and 6 will read back as zero. */
|
|
|
|
data &= 0xB3;
|
|
|
|
|
|
|
|
/* Attempting to write the OSF flag to logic 1 leaves the
|
|
|
|
value unchanged. */
|
|
|
|
data = (data & ~CTRL_OSF) | (data & s->nvram[s->ptr] & CTRL_OSF);
|
|
|
|
|
|
|
|
s->nvram[s->ptr] = data;
|
2012-10-12 12:54:38 +02:00
|
|
|
} else {
|
|
|
|
s->nvram[s->ptr] = data;
|
2009-11-20 01:21:33 +01:00
|
|
|
}
|
2012-10-12 12:54:38 +02:00
|
|
|
inc_regptr(s);
|
2009-11-20 01:21:33 +01:00
|
|
|
return 0;
|
|
|
|
}
|
|
|
|
|
2012-12-13 15:05:28 +01:00
|
|
|
static void ds1338_reset(DeviceState *dev)
|
|
|
|
{
|
2013-12-19 22:34:05 +01:00
|
|
|
DS1338State *s = DS1338(dev);
|
2012-12-13 15:05:28 +01:00
|
|
|
|
|
|
|
/* The clock is running and synchronized with the host */
|
|
|
|
s->offset = 0;
|
2012-12-13 15:05:28 +01:00
|
|
|
s->wday_offset = 0;
|
2012-12-13 15:05:28 +01:00
|
|
|
memset(s->nvram, 0, NVRAM_SIZE);
|
|
|
|
s->ptr = 0;
|
|
|
|
s->addr_byte = false;
|
|
|
|
}
|
|
|
|
|
2011-12-05 03:39:20 +01:00
|
|
|
static void ds1338_class_init(ObjectClass *klass, void *data)
|
|
|
|
{
|
2012-10-12 12:54:38 +02:00
|
|
|
DeviceClass *dc = DEVICE_CLASS(klass);
|
2011-12-05 03:39:20 +01:00
|
|
|
I2CSlaveClass *k = I2C_SLAVE_CLASS(klass);
|
|
|
|
|
|
|
|
k->event = ds1338_event;
|
|
|
|
k->recv = ds1338_recv;
|
|
|
|
k->send = ds1338_send;
|
2012-12-13 15:05:28 +01:00
|
|
|
dc->reset = ds1338_reset;
|
2012-10-12 12:54:38 +02:00
|
|
|
dc->vmsd = &vmstate_ds1338;
|
2011-12-05 03:39:20 +01:00
|
|
|
}
|
|
|
|
|
2013-01-10 16:19:07 +01:00
|
|
|
static const TypeInfo ds1338_info = {
|
2013-12-19 22:34:05 +01:00
|
|
|
.name = TYPE_DS1338,
|
2011-12-08 04:34:16 +01:00
|
|
|
.parent = TYPE_I2C_SLAVE,
|
|
|
|
.instance_size = sizeof(DS1338State),
|
|
|
|
.class_init = ds1338_class_init,
|
2009-11-20 01:21:33 +01:00
|
|
|
};
|
|
|
|
|
2012-02-09 15:20:55 +01:00
|
|
|
static void ds1338_register_types(void)
|
2009-11-20 01:21:33 +01:00
|
|
|
{
|
2011-12-08 04:34:16 +01:00
|
|
|
type_register_static(&ds1338_info);
|
2009-11-20 01:21:33 +01:00
|
|
|
}
|
|
|
|
|
2012-02-09 15:20:55 +01:00
|
|
|
type_init(ds1338_register_types)
|