2017-02-22 12:44:34 +01:00
|
|
|
/*
|
|
|
|
* PowerPC CPU routines for qemu.
|
|
|
|
*
|
|
|
|
* Copyright (c) 2017 Nikunj A Dadhania, IBM Corporation.
|
|
|
|
*
|
|
|
|
* This library is free software; you can redistribute it and/or
|
|
|
|
* modify it under the terms of the GNU Lesser General Public
|
|
|
|
* License as published by the Free Software Foundation; either
|
|
|
|
* version 2 of the License, or (at your option) any later version.
|
|
|
|
*
|
|
|
|
* This library is distributed in the hope that it will be useful,
|
|
|
|
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
|
|
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
|
|
|
* Lesser General Public License for more details.
|
|
|
|
*
|
|
|
|
* You should have received a copy of the GNU Lesser General Public
|
|
|
|
* License along with this library; if not, see <http://www.gnu.org/licenses/>.
|
|
|
|
*/
|
|
|
|
|
|
|
|
#include "qemu/osdep.h"
|
|
|
|
#include "cpu.h"
|
|
|
|
#include "cpu-models.h"
|
|
|
|
|
|
|
|
target_ulong cpu_read_xer(CPUPPCState *env)
|
|
|
|
{
|
target/ppc: support for 32-bit carry and overflow
POWER ISA 3.0 adds CA32 and OV32 status in 64-bit mode. Add the flags
and corresponding defines.
Moreover, CA32 is updated when CA is updated and OV32 is updated when OV
is updated.
Arithmetic instructions:
* Addition and Substractions:
addic, addic., subfic, addc, subfc, adde, subfe, addme, subfme,
addze, and subfze always updates CA and CA32.
=> CA reflects the carry out of bit 0 in 64-bit mode and out of
bit 32 in 32-bit mode.
=> CA32 reflects the carry out of bit 32 independent of the
mode.
=> SO and OV reflects overflow of the 64-bit result in 64-bit
mode and overflow of the low-order 32-bit result in 32-bit
mode
=> OV32 reflects overflow of the low-order 32-bit independent of
the mode
* Multiply Low and Divide:
For mulld, divd, divde, divdu and divdeu: SO, OV, and OV32 bits
reflects overflow of the 64-bit result
For mullw, divw, divwe, divwu and divweu: SO, OV, and OV32 bits
reflects overflow of the 32-bit result
* Negate with OE=1 (nego)
For 64-bit mode if the register RA contains
0x8000_0000_0000_0000, OV and OV32 are set to 1.
For 32-bit mode if the register RA contains 0x8000_0000, OV and
OV32 are set to 1.
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-02-27 05:57:54 +01:00
|
|
|
if (is_isa300(env)) {
|
|
|
|
return env->xer | (env->so << XER_SO) |
|
|
|
|
(env->ov << XER_OV) | (env->ca << XER_CA) |
|
|
|
|
(env->ov32 << XER_OV32) | (env->ca32 << XER_CA32);
|
|
|
|
}
|
|
|
|
|
2017-02-22 12:44:34 +01:00
|
|
|
return env->xer | (env->so << XER_SO) | (env->ov << XER_OV) |
|
|
|
|
(env->ca << XER_CA);
|
|
|
|
}
|
|
|
|
|
|
|
|
void cpu_write_xer(CPUPPCState *env, target_ulong xer)
|
|
|
|
{
|
|
|
|
env->so = (xer >> XER_SO) & 1;
|
|
|
|
env->ov = (xer >> XER_OV) & 1;
|
|
|
|
env->ca = (xer >> XER_CA) & 1;
|
target/ppc: support for 32-bit carry and overflow
POWER ISA 3.0 adds CA32 and OV32 status in 64-bit mode. Add the flags
and corresponding defines.
Moreover, CA32 is updated when CA is updated and OV32 is updated when OV
is updated.
Arithmetic instructions:
* Addition and Substractions:
addic, addic., subfic, addc, subfc, adde, subfe, addme, subfme,
addze, and subfze always updates CA and CA32.
=> CA reflects the carry out of bit 0 in 64-bit mode and out of
bit 32 in 32-bit mode.
=> CA32 reflects the carry out of bit 32 independent of the
mode.
=> SO and OV reflects overflow of the 64-bit result in 64-bit
mode and overflow of the low-order 32-bit result in 32-bit
mode
=> OV32 reflects overflow of the low-order 32-bit independent of
the mode
* Multiply Low and Divide:
For mulld, divd, divde, divdu and divdeu: SO, OV, and OV32 bits
reflects overflow of the 64-bit result
For mullw, divw, divwe, divwu and divweu: SO, OV, and OV32 bits
reflects overflow of the 32-bit result
* Negate with OE=1 (nego)
For 64-bit mode if the register RA contains
0x8000_0000_0000_0000, OV and OV32 are set to 1.
For 32-bit mode if the register RA contains 0x8000_0000, OV and
OV32 are set to 1.
Signed-off-by: Nikunj A Dadhania <nikunj@linux.vnet.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>
2017-02-27 05:57:54 +01:00
|
|
|
/* write all the flags, while reading back check of isa300 */
|
|
|
|
env->ov32 = (xer >> XER_OV32) & 1;
|
|
|
|
env->ca32 = (xer >> XER_CA32) & 1;
|
|
|
|
env->xer = xer & ~((1ul << XER_SO) |
|
|
|
|
(1ul << XER_OV) | (1ul << XER_CA) |
|
|
|
|
(1ul << XER_OV32) | (1ul << XER_CA32));
|
2017-02-22 12:44:34 +01:00
|
|
|
}
|