2011-02-01 15:51:27 +01:00
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/*
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* QEMU AHCI Emulation
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*
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* Copyright (c) 2010 qiaochong@loongson.cn
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* Copyright (c) 2010 Roland Elek <elek.roland@gmail.com>
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* Copyright (c) 2010 Sebastian Herbszt <herbszt@gmx.de>
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* Copyright (c) 2010 Alexander Graf <agraf@suse.de>
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*
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* This library is free software; you can redistribute it and/or
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* modify it under the terms of the GNU Lesser General Public
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* License as published by the Free Software Foundation; either
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* version 2 of the License, or (at your option) any later version.
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*
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* This library is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* Lesser General Public License for more details.
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*
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* You should have received a copy of the GNU Lesser General Public
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* License along with this library; if not, see <http://www.gnu.org/licenses/>.
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*
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*/
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2017-07-18 17:47:57 +02:00
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#ifndef HW_IDE_AHCI_H
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#define HW_IDE_AHCI_H
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2011-02-01 15:51:26 +01:00
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2016-06-22 19:11:19 +02:00
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#include "hw/sysbus.h"
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2015-09-08 18:38:45 +02:00
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2017-07-18 17:47:57 +02:00
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typedef struct AHCIDevice AHCIDevice;
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2011-02-01 15:51:26 +01:00
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2017-07-18 17:47:57 +02:00
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typedef struct AHCIControlRegs {
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uint32_t cap;
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uint32_t ghc;
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uint32_t irqstatus;
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uint32_t impl;
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uint32_t version;
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} AHCIControlRegs;
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2011-02-01 15:51:26 +01:00
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2017-07-18 17:47:57 +02:00
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typedef struct AHCIState {
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DeviceState *container;
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2011-02-01 15:51:26 +01:00
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2017-07-18 17:47:57 +02:00
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AHCIDevice *dev;
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AHCIControlRegs control_regs;
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MemoryRegion mem;
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MemoryRegion idp; /* Index-Data Pair I/O port space */
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unsigned idp_offset; /* Offset of index in I/O port space */
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uint32_t idp_index; /* Current IDP index */
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int32_t ports;
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qemu_irq irq;
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AddressSpace *as;
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} AHCIState;
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2011-02-01 15:51:26 +01:00
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2017-07-18 17:47:57 +02:00
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typedef struct AHCIPCIState AHCIPCIState;
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2011-02-01 15:51:26 +01:00
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2013-06-24 08:55:45 +02:00
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#define TYPE_ICH9_AHCI "ich9-ahci"
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2020-08-25 21:20:26 +02:00
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#define ICH_AHCI(obj) \
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OBJECT_CHECK(AHCIPCIState, (obj), TYPE_ICH9_AHCI)
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2013-06-24 08:55:45 +02:00
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2017-07-18 17:47:57 +02:00
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int32_t ahci_get_num_ports(PCIDevice *dev);
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void ahci_ide_create_devs(PCIDevice *dev, DriveInfo **hd);
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2011-02-01 15:51:26 +01:00
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2015-09-08 18:38:45 +02:00
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#define TYPE_SYSBUS_AHCI "sysbus-ahci"
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2020-08-25 21:20:26 +02:00
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#define SYSBUS_AHCI(obj) OBJECT_CHECK(SysbusAHCIState, (obj), TYPE_SYSBUS_AHCI)
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2015-09-08 18:38:45 +02:00
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2017-07-18 17:47:57 +02:00
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typedef struct SysbusAHCIState {
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/*< private >*/
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SysBusDevice parent_obj;
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/*< public >*/
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AHCIState ahci;
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uint32_t num_ports;
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} SysbusAHCIState;
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2015-11-06 20:09:01 +01:00
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#define TYPE_ALLWINNER_AHCI "allwinner-ahci"
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2020-08-25 21:20:28 +02:00
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#define ALLWINNER_AHCI(obj) \
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OBJECT_CHECK(AllwinnerAHCIState, (obj), TYPE_ALLWINNER_AHCI)
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2015-11-06 20:09:01 +01:00
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2017-07-18 17:47:57 +02:00
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#define ALLWINNER_AHCI_MMIO_OFF 0x80
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#define ALLWINNER_AHCI_MMIO_SIZE 0x80
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2019-01-11 15:08:46 +01:00
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typedef struct AllwinnerAHCIState {
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2017-07-18 17:47:57 +02:00
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/*< private >*/
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SysbusAHCIState parent_obj;
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/*< public >*/
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MemoryRegion mmio;
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uint32_t regs[ALLWINNER_AHCI_MMIO_SIZE/4];
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2019-01-11 15:08:46 +01:00
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} AllwinnerAHCIState;
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2017-07-18 17:47:57 +02:00
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2011-02-01 15:51:26 +01:00
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#endif /* HW_IDE_AHCI_H */
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