2004-04-24 02:11:51 +02:00
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/*
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* Example of use of user mode libqemu: launch a basic .com DOS
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* executable
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*/
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#include <stdlib.h>
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#include <stdio.h>
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#include <string.h>
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#include <inttypes.h>
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#include <unistd.h>
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#include <fcntl.h>
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#include <sys/mman.h>
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#include <signal.h>
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2005-12-18 20:28:08 +01:00
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#include <malloc.h>
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2004-04-24 02:11:51 +02:00
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#include "cpu.h"
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//#define SIGTEST
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int cpu_get_pic_interrupt(CPUState *env)
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{
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return -1;
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}
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2004-05-20 16:02:14 +02:00
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uint64_t cpu_get_tsc(CPUState *env)
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{
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return 0;
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}
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2007-09-16 23:08:06 +02:00
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static void set_gate(void *ptr, unsigned int type, unsigned int dpl,
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2004-04-24 02:11:51 +02:00
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unsigned long addr, unsigned int sel)
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{
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unsigned int e1, e2;
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e1 = (addr & 0xffff) | (sel << 16);
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e2 = (addr & 0xffff0000) | 0x8000 | (dpl << 13) | (type << 8);
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stl((uint8_t *)ptr, e1);
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stl((uint8_t *)ptr + 4, e2);
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}
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uint64_t idt_table[256];
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/* only dpl matters as we do only user space emulation */
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static void set_idt(int n, unsigned int dpl)
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{
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set_gate(idt_table + n, 0, dpl, 0, 0);
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}
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void qemu_free(void *ptr)
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{
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free(ptr);
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}
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void *qemu_malloc(size_t size)
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{
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return malloc(size);
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}
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2005-12-18 20:28:08 +01:00
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void *qemu_mallocz(size_t size)
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{
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void *ptr;
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ptr = qemu_malloc(size);
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if (!ptr)
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return NULL;
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memset(ptr, 0, size);
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return ptr;
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}
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void *qemu_vmalloc(size_t size)
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{
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return memalign(4096, size);
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}
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void qemu_vfree(void *ptr)
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{
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free(ptr);
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}
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2004-04-24 02:11:51 +02:00
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void qemu_printf(const char *fmt, ...)
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{
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va_list ap;
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va_start(ap, fmt);
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vprintf(fmt, ap);
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va_end(ap);
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}
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/* XXX: this is a bug in helper2.c */
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int errno;
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/**********************************************/
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#define COM_BASE_ADDR 0x10100
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2010-05-06 22:17:54 +02:00
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static void usage(void)
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2004-04-24 02:11:51 +02:00
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{
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printf("qruncom version 0.1 (c) 2003 Fabrice Bellard\n"
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"usage: qruncom file.com\n"
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"user mode libqemu demo: run simple .com DOS executables\n");
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exit(1);
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}
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static inline uint8_t *seg_to_linear(unsigned int seg, unsigned int reg)
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{
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return (uint8_t *)((seg << 4) + (reg & 0xffff));
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}
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static inline void pushw(CPUState *env, int val)
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{
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env->regs[R_ESP] = (env->regs[R_ESP] & ~0xffff) | ((env->regs[R_ESP] - 2) & 0xffff);
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*(uint16_t *)seg_to_linear(env->segs[R_SS].selector, env->regs[R_ESP]) = val;
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}
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2007-09-16 23:08:06 +02:00
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static void host_segv_handler(int host_signum, siginfo_t *info,
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2004-04-24 02:11:51 +02:00
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void *puc)
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{
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if (cpu_signal_handler(host_signum, info, puc)) {
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return;
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}
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abort();
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}
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int main(int argc, char **argv)
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{
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uint8_t *vm86_mem;
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const char *filename;
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int fd, ret, seg;
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CPUState *env;
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if (argc != 2)
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usage();
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filename = argv[1];
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2007-09-17 10:09:54 +02:00
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2007-09-16 23:08:06 +02:00
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vm86_mem = mmap((void *)0x00000000, 0x110000,
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PROT_WRITE | PROT_READ | PROT_EXEC,
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2004-04-24 02:11:51 +02:00
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MAP_FIXED | MAP_ANON | MAP_PRIVATE, -1, 0);
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if (vm86_mem == MAP_FAILED) {
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perror("mmap");
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exit(1);
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}
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/* load the MSDOS .com executable */
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fd = open(filename, O_RDONLY);
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if (fd < 0) {
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perror(filename);
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exit(1);
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}
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ret = read(fd, vm86_mem + COM_BASE_ADDR, 65536 - 256);
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if (ret < 0) {
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perror("read");
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exit(1);
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}
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close(fd);
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/* install exception handler for CPU emulator */
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{
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struct sigaction act;
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2007-09-17 10:09:54 +02:00
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2004-04-24 02:11:51 +02:00
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sigfillset(&act.sa_mask);
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act.sa_flags = SA_SIGINFO;
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// act.sa_flags |= SA_ONSTACK;
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act.sa_sigaction = host_segv_handler;
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sigaction(SIGSEGV, &act, NULL);
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sigaction(SIGBUS, &act, NULL);
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}
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// cpu_set_log(CPU_LOG_TB_IN_ASM | CPU_LOG_TB_OUT_ASM | CPU_LOG_EXEC);
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2007-11-10 16:15:54 +01:00
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env = cpu_init("qemu32");
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2004-04-24 02:11:51 +02:00
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cpu_x86_set_cpl(env, 3);
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env->cr[0] = CR0_PG_MASK | CR0_WP_MASK | CR0_PE_MASK;
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/* NOTE: hflags duplicates some of the virtual CPU state */
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env->hflags |= HF_PE_MASK | VM_MASK;
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/* flags setup : we activate the IRQs by default as in user
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mode. We also activate the VM86 flag to run DOS code */
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env->eflags |= IF_MASK | VM_MASK;
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2007-09-17 10:09:54 +02:00
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2004-04-24 02:11:51 +02:00
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/* init basic registers */
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env->eip = 0x100;
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env->regs[R_ESP] = 0xfffe;
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seg = (COM_BASE_ADDR - 0x100) >> 4;
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2007-09-16 23:08:06 +02:00
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cpu_x86_load_seg_cache(env, R_CS, seg,
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2005-12-18 20:28:08 +01:00
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(seg << 4), 0xffff, 0);
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2007-09-16 23:08:06 +02:00
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cpu_x86_load_seg_cache(env, R_SS, seg,
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2005-12-18 20:28:08 +01:00
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(seg << 4), 0xffff, 0);
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2007-09-16 23:08:06 +02:00
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cpu_x86_load_seg_cache(env, R_DS, seg,
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2005-12-18 20:28:08 +01:00
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(seg << 4), 0xffff, 0);
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2007-09-16 23:08:06 +02:00
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cpu_x86_load_seg_cache(env, R_ES, seg,
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2005-12-18 20:28:08 +01:00
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(seg << 4), 0xffff, 0);
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2007-09-16 23:08:06 +02:00
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cpu_x86_load_seg_cache(env, R_FS, seg,
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2005-12-18 20:28:08 +01:00
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(seg << 4), 0xffff, 0);
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2007-09-16 23:08:06 +02:00
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cpu_x86_load_seg_cache(env, R_GS, seg,
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2005-12-18 20:28:08 +01:00
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(seg << 4), 0xffff, 0);
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2004-04-24 02:11:51 +02:00
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/* exception support */
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2005-12-18 20:28:08 +01:00
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env->idt.base = (unsigned long)idt_table;
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2004-04-24 02:11:51 +02:00
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env->idt.limit = sizeof(idt_table) - 1;
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set_idt(0, 0);
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set_idt(1, 0);
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set_idt(2, 0);
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set_idt(3, 3);
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set_idt(4, 3);
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set_idt(5, 3);
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set_idt(6, 0);
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set_idt(7, 0);
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set_idt(8, 0);
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set_idt(9, 0);
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set_idt(10, 0);
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set_idt(11, 0);
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set_idt(12, 0);
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set_idt(13, 0);
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set_idt(14, 0);
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set_idt(15, 0);
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set_idt(16, 0);
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set_idt(17, 0);
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set_idt(18, 0);
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set_idt(19, 0);
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2007-09-17 10:09:54 +02:00
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2004-04-24 02:11:51 +02:00
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/* put return code */
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*seg_to_linear(env->segs[R_CS].selector, 0) = 0xb4; /* mov ah, $0 */
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*seg_to_linear(env->segs[R_CS].selector, 1) = 0x00;
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*seg_to_linear(env->segs[R_CS].selector, 2) = 0xcd; /* int $0x21 */
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*seg_to_linear(env->segs[R_CS].selector, 3) = 0x21;
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pushw(env, 0x0000);
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/* the value of these registers seem to be assumed by pi_10.com */
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env->regs[R_ESI] = 0x100;
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env->regs[R_ECX] = 0xff;
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env->regs[R_EBP] = 0x0900;
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env->regs[R_EDI] = 0xfffe;
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/* inform the emulator of the mmaped memory */
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2007-09-16 23:08:06 +02:00
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page_set_flags(0x00000000, 0x110000,
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2004-04-24 02:11:51 +02:00
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PAGE_WRITE | PAGE_READ | PAGE_EXEC | PAGE_VALID);
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for(;;) {
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ret = cpu_x86_exec(env);
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switch(ret) {
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case EXCP0D_GPF:
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{
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int int_num, ah;
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2005-12-18 20:28:08 +01:00
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int_num = *(uint8_t *)(env->segs[R_CS].base + env->eip + 1);
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2004-04-24 02:11:51 +02:00
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if (int_num != 0x21)
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goto unknown_int;
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ah = (env->regs[R_EAX] >> 8) & 0xff;
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switch(ah) {
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case 0x00: /* exit */
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exit(0);
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case 0x02: /* write char */
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{
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uint8_t c = env->regs[R_EDX];
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write(1, &c, 1);
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}
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break;
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case 0x09: /* write string */
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{
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uint8_t c;
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for(;;) {
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c = *seg_to_linear(env->segs[R_DS].selector, env->regs[R_EAX]);
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if (c == '$')
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break;
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write(1, &c, 1);
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}
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env->regs[R_EAX] = (env->regs[R_EAX] & ~0xff) | '$';
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}
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break;
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default:
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unknown_int:
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fprintf(stderr, "unsupported int 0x%02x\n", int_num);
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2005-12-18 20:28:08 +01:00
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cpu_dump_state(env, stderr, fprintf, 0);
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2004-04-24 02:11:51 +02:00
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// exit(1);
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}
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env->eip += 2;
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}
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break;
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default:
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fprintf(stderr, "unhandled cpu_exec return code (0x%x)\n", ret);
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2005-12-18 20:28:08 +01:00
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cpu_dump_state(env, stderr, fprintf, 0);
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2004-04-24 02:11:51 +02:00
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exit(1);
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}
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}
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}
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