2015-02-12 18:02:14 +01:00
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/*
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* s390 IPL device
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*
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2020-03-23 09:36:06 +01:00
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* Copyright 2015, 2020 IBM Corp.
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2015-02-12 18:02:14 +01:00
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* Author(s): Zhang Fan <bjfanzh@cn.ibm.com>
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2020-03-23 09:36:06 +01:00
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* Janosch Frank <frankja@linux.ibm.com>
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2015-02-12 18:02:14 +01:00
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*
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* This work is licensed under the terms of the GNU GPL, version 2 or (at
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* your option) any later version. See the COPYING file in the top-level
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* directory.
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*/
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#ifndef HW_S390_IPL_H
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#define HW_S390_IPL_H
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2015-07-21 13:47:32 +02:00
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#include "cpu.h"
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2020-04-06 12:01:58 +02:00
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#include "exec/address-spaces.h"
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2019-08-12 07:23:51 +02:00
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#include "hw/qdev-core.h"
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2015-07-21 13:47:32 +02:00
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2020-03-23 09:36:06 +01:00
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struct IPLBlockPVComp {
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uint64_t tweak_pref;
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uint64_t addr;
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uint64_t size;
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} QEMU_PACKED;
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typedef struct IPLBlockPVComp IPLBlockPVComp;
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struct IPLBlockPV {
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uint8_t reserved18[87]; /* 0x18 */
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uint8_t version; /* 0x6f */
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uint32_t reserved70; /* 0x70 */
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uint32_t num_comp; /* 0x74 */
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uint64_t pv_header_addr; /* 0x78 */
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uint64_t pv_header_len; /* 0x80 */
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struct IPLBlockPVComp components[];
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} QEMU_PACKED;
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typedef struct IPLBlockPV IPLBlockPV;
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2015-07-13 14:04:36 +02:00
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struct IplBlockCcw {
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2018-02-23 16:43:11 +01:00
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uint8_t reserved0[85];
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2015-10-01 19:21:33 +02:00
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uint8_t ssid;
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2015-07-13 14:04:36 +02:00
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uint16_t devno;
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uint8_t vm_flags;
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uint8_t reserved3[3];
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uint32_t vm_parm_len;
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uint8_t nss_name[8];
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uint8_t vm_parm[64];
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uint8_t reserved4[8];
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} QEMU_PACKED;
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typedef struct IplBlockCcw IplBlockCcw;
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struct IplBlockFcp {
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uint8_t reserved1[305 - 1];
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uint8_t opt;
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uint8_t reserved2[3];
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uint16_t reserved3;
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uint16_t devno;
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uint8_t reserved4[4];
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uint64_t wwpn;
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uint64_t lun;
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uint32_t bootprog;
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uint8_t reserved5[12];
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uint64_t br_lba;
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uint32_t scp_data_len;
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uint8_t reserved6[260];
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uint8_t scp_data[];
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} QEMU_PACKED;
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typedef struct IplBlockFcp IplBlockFcp;
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2016-06-09 14:54:10 +02:00
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struct IplBlockQemuScsi {
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uint32_t lun;
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uint16_t target;
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uint16_t channel;
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uint8_t reserved0[77];
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uint8_t ssid;
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uint16_t devno;
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} QEMU_PACKED;
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typedef struct IplBlockQemuScsi IplBlockQemuScsi;
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2016-03-29 16:28:40 +02:00
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#define DIAG308_FLAGS_LP_VALID 0x80
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2015-07-13 14:04:36 +02:00
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union IplParameterBlock {
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struct {
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uint32_t len;
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uint8_t reserved0[3];
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uint8_t version;
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uint32_t blk0_len;
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uint8_t pbt;
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uint8_t flags;
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uint16_t reserved01;
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uint8_t loadparm[8];
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union {
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IplBlockCcw ccw;
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IplBlockFcp fcp;
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2020-03-23 09:36:06 +01:00
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IPLBlockPV pv;
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2016-06-09 14:54:10 +02:00
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IplBlockQemuScsi scsi;
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2015-07-13 14:04:36 +02:00
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};
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} QEMU_PACKED;
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struct {
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uint8_t reserved1[110];
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uint16_t devno;
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uint8_t reserved2[88];
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uint8_t reserved_ext[4096 - 200];
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} QEMU_PACKED;
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} QEMU_PACKED;
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typedef union IplParameterBlock IplParameterBlock;
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2015-02-12 18:02:14 +01:00
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2016-03-29 16:28:40 +02:00
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int s390_ipl_set_loadparm(uint8_t *loadparm);
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2015-06-25 09:55:55 +02:00
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void s390_ipl_update_diag308(IplParameterBlock *iplb);
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2020-03-23 09:36:06 +01:00
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int s390_ipl_prepare_pv_header(void);
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int s390_ipl_pv_unpack(void);
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2015-07-21 13:47:32 +02:00
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void s390_ipl_prepare_cpu(S390CPU *cpu);
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2015-02-12 18:02:14 +01:00
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IplParameterBlock *s390_ipl_get_iplb(void);
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2020-03-23 09:36:06 +01:00
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IplParameterBlock *s390_ipl_get_iplb_pv(void);
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2018-04-24 12:18:59 +02:00
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enum s390_reset {
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/* default is a reset not triggered by a CPU e.g. issued by QMP */
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S390_RESET_EXTERNAL = 0,
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S390_RESET_REIPL,
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S390_RESET_MODIFIED_CLEAR,
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S390_RESET_LOAD_NORMAL,
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2020-03-23 09:36:06 +01:00
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S390_RESET_PV,
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2018-04-24 12:18:59 +02:00
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};
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void s390_ipl_reset_request(CPUState *cs, enum s390_reset reset_type);
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void s390_ipl_get_reset_request(CPUState **cs, enum s390_reset *reset_type);
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void s390_ipl_clear_reset_request(void);
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2015-02-12 18:02:14 +01:00
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2018-02-23 16:43:11 +01:00
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#define QIPL_ADDRESS 0xcc
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2018-02-23 16:43:12 +01:00
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/* Boot Menu flags */
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#define QIPL_FLAG_BM_OPTS_CMD 0x80
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2018-02-23 16:43:18 +01:00
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#define QIPL_FLAG_BM_OPTS_ZIPL 0x40
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2018-02-23 16:43:12 +01:00
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2018-02-23 16:43:11 +01:00
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/*
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* The QEMU IPL Parameters will be stored at absolute address
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* 204 (0xcc) which means it is 32-bit word aligned but not
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* double-word aligned.
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* Placement of data fields in this area must account for
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* their alignment needs. E.g., netboot_start_address must
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* have an offset of 4 + n * 8 bytes within the struct in order
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* to keep it double-word aligned.
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* The total size of the struct must never exceed 28 bytes.
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* This definition must be kept in sync with the defininition
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* in pc-bios/s390-ccw/iplb.h.
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*/
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struct QemuIplParameters {
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2018-02-23 16:43:12 +01:00
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uint8_t qipl_flags;
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uint8_t reserved1[3];
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2018-02-23 16:43:11 +01:00
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uint64_t netboot_start_addr;
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2018-02-23 16:43:12 +01:00
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uint32_t boot_menu_timeout;
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uint8_t reserved2[12];
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2018-02-23 16:43:11 +01:00
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} QEMU_PACKED;
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typedef struct QemuIplParameters QemuIplParameters;
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2015-10-08 12:32:13 +02:00
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#define TYPE_S390_IPL "s390-ipl"
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#define S390_IPL(obj) OBJECT_CHECK(S390IPLState, (obj), TYPE_S390_IPL)
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struct S390IPLState {
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/*< private >*/
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DeviceState parent_obj;
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2018-09-27 10:23:33 +02:00
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IplParameterBlock iplb;
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2020-03-23 09:36:06 +01:00
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IplParameterBlock iplb_pv;
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2018-09-27 10:23:33 +02:00
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QemuIplParameters qipl;
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2015-10-08 12:32:13 +02:00
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uint64_t start_addr;
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2016-06-09 15:36:41 +02:00
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uint64_t compat_start_addr;
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2015-10-08 12:32:13 +02:00
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uint64_t bios_start_addr;
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2016-06-09 15:36:41 +02:00
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uint64_t compat_bios_start_addr;
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2015-10-08 12:32:13 +02:00
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bool enforce_bios;
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bool iplb_valid;
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2020-03-23 09:36:06 +01:00
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bool iplb_valid_pv;
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2016-10-20 23:59:20 +02:00
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bool netboot;
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2018-04-24 12:18:59 +02:00
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/* reset related properties don't have to be migrated or reset */
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enum s390_reset reset_type;
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int reset_cpu_index;
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2015-10-08 12:32:13 +02:00
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/*< public >*/
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char *kernel;
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char *initrd;
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char *cmdline;
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char *firmware;
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2016-10-21 18:17:08 +02:00
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char *netboot_fw;
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2015-10-08 12:32:13 +02:00
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uint8_t cssid;
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uint8_t ssid;
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uint16_t devno;
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2015-07-13 14:04:36 +02:00
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bool iplbext_migration;
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2015-10-08 12:32:13 +02:00
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};
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typedef struct S390IPLState S390IPLState;
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2018-09-27 10:23:33 +02:00
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QEMU_BUILD_BUG_MSG(offsetof(S390IPLState, iplb) & 3, "alignment of iplb wrong");
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2015-10-08 12:32:13 +02:00
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2020-03-19 14:19:06 +01:00
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#define DIAG_308_RC_OK 0x0001
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#define DIAG_308_RC_NO_CONF 0x0102
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#define DIAG_308_RC_INVALID 0x0402
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2020-03-23 09:36:06 +01:00
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#define DIAG_308_RC_NO_PV_CONF 0x0902
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#define DIAG_308_RC_INVAL_FOR_PV 0x0a02
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2020-03-19 14:19:06 +01:00
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#define DIAG308_RESET_MOD_CLR 0
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#define DIAG308_RESET_LOAD_NORM 1
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#define DIAG308_LOAD_CLEAR 3
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#define DIAG308_LOAD_NORMAL_DUMP 4
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#define DIAG308_SET 5
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#define DIAG308_STORE 6
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2020-03-23 09:36:06 +01:00
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#define DIAG308_PV_SET 8
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#define DIAG308_PV_STORE 9
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#define DIAG308_PV_START 10
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2020-03-19 14:19:06 +01:00
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2015-08-10 12:57:03 +02:00
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#define S390_IPL_TYPE_FCP 0x00
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#define S390_IPL_TYPE_CCW 0x02
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2020-03-23 09:36:06 +01:00
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#define S390_IPL_TYPE_PV 0x05
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2016-06-09 14:54:10 +02:00
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#define S390_IPL_TYPE_QEMU_SCSI 0xff
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2015-08-10 12:57:03 +02:00
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2015-07-21 13:10:39 +02:00
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#define S390_IPLB_HEADER_LEN 8
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2020-03-23 09:36:06 +01:00
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#define S390_IPLB_MIN_PV_LEN 148
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2015-07-13 14:04:36 +02:00
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#define S390_IPLB_MIN_CCW_LEN 200
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2015-08-10 12:57:03 +02:00
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#define S390_IPLB_MIN_FCP_LEN 384
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2016-06-09 14:54:10 +02:00
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#define S390_IPLB_MIN_QEMU_SCSI_LEN 200
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2015-08-10 12:57:03 +02:00
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static inline bool iplb_valid_len(IplParameterBlock *iplb)
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{
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return be32_to_cpu(iplb->len) <= sizeof(IplParameterBlock);
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}
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2020-03-23 09:36:06 +01:00
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static inline bool ipl_valid_pv_components(IplParameterBlock *iplb)
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{
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IPLBlockPV *ipib_pv = &iplb->pv;
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int i;
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if (ipib_pv->num_comp == 0) {
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return false;
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}
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for (i = 0; i < ipib_pv->num_comp; i++) {
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/* Addr must be 4k aligned */
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if (ipib_pv->components[i].addr & ~TARGET_PAGE_MASK) {
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return false;
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}
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/* Tweak prefix is monotonically increasing with each component */
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if (i < ipib_pv->num_comp - 1 &&
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ipib_pv->components[i].tweak_pref >=
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ipib_pv->components[i + 1].tweak_pref) {
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return false;
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}
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}
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return true;
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}
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static inline bool ipl_valid_pv_header(IplParameterBlock *iplb)
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{
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IPLBlockPV *ipib_pv = &iplb->pv;
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if (ipib_pv->pv_header_len > 2 * TARGET_PAGE_SIZE) {
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return false;
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}
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if (!address_space_access_valid(&address_space_memory,
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ipib_pv->pv_header_addr,
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ipib_pv->pv_header_len,
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false,
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MEMTXATTRS_UNSPECIFIED)) {
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return false;
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}
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return true;
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}
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static inline bool iplb_valid_pv(IplParameterBlock *iplb)
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{
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if (iplb->pbt != S390_IPL_TYPE_PV ||
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be32_to_cpu(iplb->len) < S390_IPLB_MIN_PV_LEN) {
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return false;
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}
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if (!ipl_valid_pv_header(iplb)) {
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return false;
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}
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return ipl_valid_pv_components(iplb);
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}
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2020-03-10 10:09:50 +01:00
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static inline bool iplb_valid(IplParameterBlock *iplb)
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2015-08-10 12:57:03 +02:00
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{
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2020-03-10 10:09:50 +01:00
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switch (iplb->pbt) {
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case S390_IPL_TYPE_FCP:
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return be32_to_cpu(iplb->len) >= S390_IPLB_MIN_FCP_LEN;
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case S390_IPL_TYPE_CCW:
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return be32_to_cpu(iplb->len) >= S390_IPLB_MIN_CCW_LEN;
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default:
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return false;
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}
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2015-08-10 12:57:03 +02:00
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}
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2015-07-13 14:04:36 +02:00
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2015-02-12 18:02:14 +01:00
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#endif
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